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Date: Tue, 10 Dec 1996 20:32:38 GMTServer: NCSA/1.4.2Content-type: text/html<html><head><title>The RaPiD Project </title></head><body background=http://www.cs.washington.edu/homes/sml/blue_paper.gif><h2>RaPiD: Reconfigurable Pipelined Datapath</h2><h3>Adventures in Configurable Computing</h3>RaPiD is a coarse-grained FPGA architecture that allows deeplypipelined computational datapaths to be constructed dynamically from amix of ALUs, multipliers, and other functional units along withregisters and local memories. The goal is to compile regularcomputations like those found in DSP applications into both anapplication-specific datapath and a program that provides control forthat datapath. The datapath control signals are divided into staticand dynamic signals. The static control signals determine theunderlying structure of the datapath that remains constant for aparticular application. The dynamic control signals can change fromcycle to cycle and specify the variable part of the computation, forexample operations that change during the computation.<!-- The staticcontrol signals are generated by static RAM cells that are changed toreconfigure the datapath to a different application. The dynamiccontrol is provided by a control program and can include feedbackgenerated by datapath operations.--><p>The current definition of RaPiD is biased strongly towards linearpipelines constructed of linear arrays of functional unitscommunicating in mostly a nearest-neighbor fashion. Linear systolicarrays, for example, map very nicely into RaPiD datapaths, which allowsthe considerable amount of research on compiling to systolic arrays tobe applied to compiling computations to RaPiD. RaPiD is not limitedto implementing systolic arrays, however. For example, a pipeline canbe constructed which comprises different computations at differentstages and at different times.<p>The concept of RaPiD can be extended to 2-D arrays of functionalunits. However, dynamically configuring 2-D arrays is much moredifficult and the underlying communication structure is much morecostly. Since most 2-D computations can be computed efficiently usinga linear array, so a 2-D RaPiD may not be necessary.<p>RaPiD is aimed at tasks that are highly structured and repetitive andwhose control flow is very regular with little data dependency.Examples include most DSP applications and many scientific computingtasks. It is expected that a RaPiD array will be integrated closelywith a RISC processor, possibly on the same chip, with RISCcontrolling the overall computational flow and farming out theheavy-duty computation requiring brute force computing to RaPiD.<p>The computational bandwidth provided by a RaPiD array is extremelyhigh and scales with the size of the array. The input and output databandwidth, however, is limited to the data memory bandwidth which doesnot scale. Thus the amount of computation performed per I/O operationbounds the amount of parallelism and thus the speedup an applicationcan exhibit when implemented using RaPiD. The RaPiD architectureassumes that at most three memory accesses are made per cycle which isabout the limit high-performance memory architectures can provide.<p><!--\begin{figure}[htbp]\pspicture{overview.ps}{300}\caption{An overview of the complete RaPiD architecture. Thedatapath and control path form the core of the architecture, with thecontroller, the I/O streams and the memory interface providingsupport.}\label{f:cell}\end{figure}--><!--The RaPiD architecture is comprised of several interconnectedcomponents as shown in the above figure.<OL><li>Data path - This comprises the coreof the architecture and contains functional units, registers, andlocal memories, and the busses used to interconnect them into apipeline. Static RAM cells provide the static control signals used toconfigure the array into a pipelined datapath. Dynamic controlsignals which govern the operation of functional units are provided bythe control path.<li>Control path - The dynamic controlinformation (which we will call an instruction) that governs theoperation of the data path on a cycle by cycle basis is passed to thepipelined datapath via the control path. Instructions are insertedinto the control path by a programmed controller according to thecomputation being performed, and are shifted down the control path ina pipelined manner. The dynamic control signals used by each stage ofthe pipelined datapath are computed from the instructions passingthrough the control path.<li>Controller - The instructions inserted into the control pathare generated by a controller which executes a control programcorresponding to the computation being executed by the pipelineddatapath. The control information which must be sent to the datapathincludes the dynamically changing operations to be executed, localmemory reads and writes and I/O stream reads and writes.<li>I/O streams - All data enters and exits the datapath via I/Ostreams. These streams are connected to the ends of the datapath andprovide queues for input data required by the datapath and for outputdata produced by the datapath. The datapath explicitly reads andwrites the I/O streams. Each I/O stream generates the external memoryaddresses required to read or write the data in the stream.<li>Memory interface - The memory interface performs the actualmemory reads and writes on behalf of the I/O streams. The memoryinterface may reorder memory accesses or provide caches to maximizethe memory bandwidth.</OL>RaPiD is programmed by first mapping the computation onto a staticdatapath pipeline. This pipeline may use dynamic control signals toexecute operations during specific clock cycles. The staticprogramming bits are used to construct the underlying pipeline anddynamically changing operations are scheduled and compiled into thecontrol program executing in the datapath controller. The data setsused and produced by the computation are compiled into I/O streamsincluding the information required to generate the addresses of thedata in external memory.--><HR><h2>Rapidly working people</h2><h3>Faculty</h3> <dl><dd> <!WA0><!WA0><!WA0><!WA0><!WA0><!WA0><a href="http://www.cs.washington.edu/people/faculty/ebeling.html"> Carl Ebeling</a> </dl><h3>Graduate students</h3><dl><dd> <!WA1><!WA1><!WA1><!WA1><!WA1><!WA1><a href="http://www.cs.washington.edu/homes/darrenc/">Darren Cronquist</a> <dd> <!WA2><!WA2><!WA2><!WA2><!WA2><!WA2><a href="http://www.cs.washington.edu/homes/paul/">Paul Franklin</a> <dd> <!WA3><!WA3><!WA3><!WA3><!WA3><!WA3><a href="http://www.cs.washington.edu/homes/jasons/">Jason Secosky</a> </dl><h3>Undergraduate students</h3><dl><dd> <!WA4><!WA4><!WA4><!WA4><!WA4><!WA4><a href="http://www.cs.washington.edu/homes/weener/">Jeff Weener</a> <dd> <!WA5><!WA5><!WA5><!WA5><!WA5><!WA5><a href="http://www.cs.washington.edu/homes/smith/">Kent Smith</a> </dl><h3>Staff</h3> <dl><dd> <!WA6><!WA6><!WA6><!WA6><!WA6><!WA6><a href="http://www.cs.washington.edu/homes/fisher/">Chris Fisher</a> <dd> <!WA7><!WA7><!WA7><!WA7><!WA7><!WA7><a href="http://www.cs.washington.edu/homes/larry/">Larry McMurchie</a> </dl><!-- <!WA8><!WA8><!WA8><!WA8><!WA8><!WA8><a href="http://www.cs.washington.edu/research/projects/lis/www/rapid/publication.html"> --><h2>List of Papers</h2><DT> Carl Ebeling, Darren C. Cronquist, Paul Franklin.<DD><!WA9><!WA9><!WA9><!WA9><!WA9><!WA9><a href="http://www.cs.washington.edu/research/projects/lis/www/papers/postscript/cronquist-fpl.ps">"RaPiD - ReconfigurablePipelined Datapath"</a>, in <em>The 6th International Workshop onField-Programmable Logic and Applications, 1996</em>.<!-- </a> --><h2>RaPiD sponsors</h2><UL><LI> ARPA under contract N00014-J-91-4041<LI> National Science Graduate Fellowship (Franklin)<LI> IBM Graduate Fellowship (Cronquist)</UL><!WA10><!WA10><!WA10><!WA10><!WA10><!WA10><A HREF="http://www.cs.washington.edu/research/projects/lis/www/.."> UW LIS</A><BR><!WA11><!WA11><!WA11><!WA11><!WA11><!WA11><A HREF="http://www.cs.washington.edu">Department of Computer Science and Engineering</A><BR><!WA12><!WA12><!WA12><!WA12><!WA12><!WA12><A HREF="http://www.washington.edu">University of Washington</A><hr>Last updatedThu July 11 12:34:47 PDT 1996<hr></html>⌨️ 快捷键说明
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