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Date: Tue, 10 Dec 1996 20:34:01 GMTServer: NCSA/1.4.2Content-type: text/htmlLast-modified: Thu, 05 Oct 1995 20:44:06 GMTContent-length: 1370<html><head><title>Soha's Education</title></head><h1> Soha Hassoun: Education </h1><hr><body><img alt="o" src="./uw.gif"> <b>University of Washington</b>, Seattle, WA.<BR><p>University of Washington</b>, Seattle, WA. June 1993 - Present: <BR>Working towards a Ph.D. in Computer Science and Engineering. <BR>Topic: Architectural Retiming.<BR>Research interests: Computer Aided Design (timing verification, logic and high-level synthesis), synchronous circuit design, computer and processor architecture, and parallel implementations and architectures.<BR> Thesis Advisor: Prof. Carl Ebeling.<BR><p>October 1991 - June 1993: M.S. in Computer Science and Engineering. <BR>Project Topic: Improving finite state assignment for two-level programmable logic devices. <BR>Project Advisor: Prof. Gaetano Borriello.<BR><p><img alt="o" src="./mit_court.gif"> <b>Massachusetts Institute of Technology</b>,Cambridge, MA.<BR> September 1986 - May 1988: M.S. in Electrical Engineering. <BR> Thesis Topic: A Memory Design for the Message-Driven Processor.<BR> Thesis Advisor: Prof. Bill Dally.<p><img alt="o" src="./campanille.gif"><b> South Dakota State University</b>, Brookings, SD. <BR> September 1982 - May 1986: <i>B.S. in Electrical Engineering </i><BR>Minor studies in Math and French. </html> ⌨️ 快捷键说明
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