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Date: Tue, 10 Dec 1996 21:59:35 GMTServer: NCSA/1.4.2Content-type: text/htmlLast-modified: Wed, 09 Oct 1996 01:26:54 GMTContent-length: 3484<html><head> <title>MIPSI - MIPS Simulator</title></head><body><h1> <!WA0><img src="http://www.cs.washington.edu/homes/egs/pics/mips-logo.gif" ALT="Logo"><a name="top">MIPSI - MIPS Simulator</a><br></h1><hr><h2>Description</h2><p>MIPSI is an instruction-level simulator for the <!WA1><a href="http://www.mips.com/Mips_Chip_Rm.html">MIPS</a> family of processors. Its mainattributes are its simplicity and robustness - mipsi can run SPECbenchmarks as well as complicated, on-the-fly code generating programssuch as the Standard ML of New Jersey without anymodification. MIPSI runs on big or little endian MIPS boxes and onAlpha platforms. On mips based work stations, the slowdown due tosimulation is about 65 times the speed of native code for most SPEC benchmarks. On an alpha 400 cross-simulating an R3000, theslowdown is roughly 4.<h2>History</h2><p>My goal in writing MIPSI was to investigate the amount of fine-graininstruction level parallelism available in C and ML programs, and then to find out if alternative garbage collection schemes couldpossibly increase the amount of parallelism. The garbage collector is responsible for the layout of data in garbage collected systems. Thusthe decisions made by the garbage collector have a big impact on the cache performance of programs. On future architectures with speculativeexecution, such impact is amplified as the speculative forward progress of the processor is interrupted by cache misses. <h2>Current Uses</h2><p>MIPSI has been used by <!WA2><a href="http://www.cs.princeton.edu/~appel/">Andrew Appel</a>and Marcelo Goncalves at Princeton University to investigate garbagecollection alternatives for future architectures. Here is <!WA3><a href="http://www.cs.princeton.edu/~appel/papers/cache.ps">their resulting paper</a>.<p>Dean Tullsen has modified MIPSI to simulate the Alpha instruction set, and has been using it, along with Susan Eggers and Hank Levy, toinvestigate <!WA4><a href="http://www.cs.washington.edu/homes/eggers/Research/multithread.html">multithreaded processor architectures</a>.<p>Various classes at the University of Washington have used MIPSI as aneducational tool. The undergraduate operating systems class has used MIPSIto teach students about virtual memory. The undergraduate architectureclass has used MIPSI to investigate cache architectures, and thegraduate architecture classes have used MIPSI in numerous ways, fromexamining branch prediction behaviour to measuring instruction mix inC++ programs to comparing superscalar and superpipelined architectures.<h2>Reference</h2>The reference for MIPSI that describes the simulator and some of the thingsI did with it is the undergraduate senior report I wrote. Here is thereference in bibtex form:<pre>@UNPUBLISHED{mipsi, AUTHOR= {Emin Gun Sirer}, TITLE= "{Measuring Limits of Fine-Grain Parallelism}", NOTE= {Princeton University Senior Project}, MONTH= jun, YEAR= {1993}}</pre><h2>Availability</h2>MIPSI is free for academic/educational uses. If you are interested inacquiring it, please let me know by sending a <!WA5><a href="mailto:egs@cs.washington.edu">message</a>. If you have acommercial application for MIPSI, please contact me either by <!WA6><a href="mailto:egs@cs.washington.edu">email</a> or by phoneat (206) 543-5129 and I would be happy to help.<hr><address><!WA7><a href="http://www.cs.washington.edu/homes/egs">Emin Gün Sirer</a>egs@cs.washington.edu</address></body></html>⌨️ 快捷键说明
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