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Date: Wed, 20 Nov 1996 19:18:51 GMT
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<H1>Design Automation Tools for VLSI Circuits</H1><BR>
<P ALIGN = CENTER>
Sreejit Chakravarty </P>
<P>
Our group is involved in the development of design automation tools which are
required for the design, validation and quality control of VLSI circuits.
Tools required for such tasks motivates a wide variety of computational
problems. We study the develpoment of good algorithms, both serial and 
distributed, for such problems. Bulk of the research to date has been supported
by grants from NSF. Currently there are three on going projects.</P>

<!WA0><A HREF="http://www.cs.buffalo.edu/pub/WWW/faculty/sreejit/research/detection.ps">Evaluation and Generation of Tests to Detect Bridging 
Faults</A><BR>
<!WA1><A HREF="http://www.cs.buffalo.edu/pub/WWW/faculty/sreejit/research/diagnosis.ps">Diagnosis of VLSI Circuits</A><BR>
<!WA2><A HREF="http://www.cs.buffalo.edu/pub/WWW/faculty/sreejit/research/stress.ps">Computing Stress Tests</A><BR>

<P>
In addition to these work we have also research results on other topics like
Synthesis of Delay Fault Testable Circuits, Binary Decision Diagrams,
Computing Detection Probability etc. For a complete list of papers traverse the
following links.<BR>
<!WA3><A HREF="http://www.cs.buffalo.edu/pub/WWW/faculty/sreejit/confpub.html">Conference Papers</A><BR>
<!WA4><A HREF="http://www.cs.buffalo.edu/pub/WWW/faculty/sreejit/journalpub.html">Journal Papers</A><BR>
</P>