http:^^www.cs.washington.edu^research^projects^lis^www^index.html

来自「This data set contains WWW-pages collect」· HTML 代码 · 共 220 行 · 第 1/2 页

	A complete set of mapping, placement and routing tools
can be generated automatically from a description of an FPGA
architecture.  Architecture-specific metrics can be incorporated
into the various tools to improve the results.
</TD>
</TR>

<TR>
<TD>
<!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><!WA32><IMG SRC="http://www.cs.washington.edu/research/projects/lis/www/pic/emb.gif">
<H3>Embedded Systems</H3>
</TD>
<TD>
<!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><!WA33><img alt="o" src="http://www.cs.washington.edu/research/projects/lis/www/neatstuff/blueball.gif">
<!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><!WA34><a href="http://www.cs.washington.edu/research/projects/lis/www/chinook/index.html">
The <em>Chinook</em> Project</a>:<!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><!WA35><IMG SRC="http://www.cs.washington.edu/research/projects/lis/www/pic/smallfish.gif" ALIGN=RIGHT>
	A Hardware/Software Co-design, Co-synthesis, and Co-simulation
	system for embedded applications.
</dl>
</TD>
</TR>

<TR>
<TD>
<!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><!WA36><IMG SRC="http://www.cs.washington.edu/research/projects/lis/www/pic/retiming.gif">
<H3>Performance Optimization of Synchronous Circuits</H3>
</TD>
<TD>

<!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><!WA37><img alt="o" src="http://www.cs.washington.edu/research/projects/lis/www/neatstuff/blueball.gif">
<!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><!WA38><a href=http://www.cs.washington.edu/research/projects/lis/www/retiming/>
Retiming Level-Clocked Circuits</a>:
	Efficient algorithms for retiming circuits that use
level-sensitive latches to improve performance, reduce cost, and
increase tolerance to clock skew.
<P>
<!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><!WA39><img alt="o" src="http://www.cs.washington.edu/research/projects/lis/www/neatstuff/blueball.gif">
<!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><!WA40><a href=http://www.cs.washington.edu/research/projects/lis/www/archretiming/>
Architectural Retiming</a>:
	Methods for improving the performance of synchronous
circuits that have latency or feedback contraints.<P>
</dl>
</TD>
</TR>


<TR>
<TD><H3>Network Router</H3></TD>
<TD><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><!WA41><A HREF="http://www.cs.washington.edu/research/projects/lis/chaos/www/chaos.html">The Chaotic
Routing Project</A> <!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><!WA42><IMG SRC="http://www.cs.washington.edu/research/projects/lis/www/pic/chaos.gif"
ALIGN=MIDDLE>
</TD>
</TR>

<TR>
<TD>
<!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><!WA43><IMG SRC="http://www.cs.washington.edu/research/projects/lis/www/pic/selftune.gif">
<H3>Self-Tuned Systems</H3>
</TD>
<TD>
Self-tuned systems are directed by Ted Kehl
</TD>
</TR>
</TABLE>

<A NAME="prev"><H2>Previous Research Projects</H2></A>

<dl>
<dt> <!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><!WA44><img alt="o" src="http://www.cs.washington.edu/research/projects/lis/www/neatstuff/blueball.gif">
<!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><!WA45><a href=http://www.cs.washington.edu/research/projects/lis/www/gemini/gemini.html> Gemini</a>
	<dd> Validating layout by comparing the specification circuit to the
	implemented circuit.
<dt> <!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><!WA46><img alt="o" src="http://www.cs.washington.edu/research/projects/lis/www/neatstuff/blueball.gif">
<!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><!WA47><a href="http://www.cs.washington.edu/research/projects/lis/mactester/www/mactester.html">
MacTester</a>
	<dd> A low-cost digital functional tester for chips and circuits
	with TTL or CMOS voltage levels.
</dl>


<!-- 
<A NAME="prev"><H2>ARPA Reports</H2></A>




<A NAME="prev"><H2>ARPA Bluebook Paragraphs</H2></A>

<dl>
<dt> <!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><!WA48><img alt="o" src="http://www.cs.washington.edu/research/projects/lis/www/neatstuff/blueball.gif">
<!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><!WA49><a href=http://www.cs.washington.edu/research/projects/lis/www/bluebook/overview.html> Overview</a>

<dt> <!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><!WA50><img alt="o" src="http://www.cs.washington.edu/research/projects/lis/www/neatstuff/blueball.gif">
<!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><!WA51><a href=http://www.cs.washington.edu/research/projects/lis/www/bluebook/accomplishments.html> Accomplishments</a>

<dt> <!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><!WA52><img alt="o" src="http://www.cs.washington.edu/research/projects/lis/www/neatstuff/blueball.gif">
<!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><!WA53><a href=http://www.cs.washington.edu/research/projects/lis/www/bluebook/embedded.systems.html> Embedded Systems</a>

<dt> <!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><!WA54><img alt="o" src="http://www.cs.washington.edu/research/projects/lis/www/neatstuff/blueball.gif">
<!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><!WA55><a href=http://www.cs.washington.edu/research/projects/lis/www/bluebook/h-p.html> High Performance</a>


</dl>

-->

</BODY>

</HTML>