http:^^www.cs.ucr.edu^~vahid^
来自「This data set contains WWW-pages collect」· EDU^~VAHID^ 代码 · 共 97 行
EDU^~VAHID^
97 行
Date: Thu, 21 Nov 1996 20:02:22 GMT
Server: Apache/1.1.1
Content-type: text/html
Content-length: 3044
Last-modified: Mon, 07 Oct 1996 23:46:17 GMT
<title>Frank Vahid's Home Page</title><h1>Frank Vahid's Home Page</h1><h2>Education and Work</h2><ul><li>B.S. in Electrical Engineering, University of Illinois, Urbana-Champaign, 1988.<li>M.S. and Ph.D. in Computer Science, University of California, Irvine, 1990 and 1994.<li> R&D engineer, Hewlett Packard, Santa Clara, California.<li> R&D engineer, AMCC, San Diego, California.</ul><hr><h2>Research Topics</h2><ul><li>Hardware/software codesign of embedded systems, with emphasis on functional partitioning. An embedded system is almost any computing system other than a desktop computer or server. Examples include automobile cruise-control and fuel-injection, aircraft autopilots, telecommunication products, TV set-top boxes, network switches, VCR's, camcorders, robot controllers, medical devices, and audio/video encoders and decoders. Hardware/software codesign is the problem of designing systems implemented with both standard processors and custom digital hardware processors. Tasks include specifying the system's functionality, partitioning the functionality among standard and custom processors, interfacing the hardware and software, and simulating the entire system to verify correctness before creating expensive implementations.</ul><hr><h2>Recent Results</h2><ul><li> A model for hardware/software partitioning (SLIF-AG).<li> Demonstration of the advantages of functional partitioning over the current structural partitioning approach for distributing a system among packages (with Yu-Chin Hsu and Thuy Le). <li> New system-level transformations (e.g., procedure exlining, procedure cloning) that ease the task of exploring size/performance tradeoffs, a task currently accomplished by manually rewriting a specification.<li> Communication libraries for embedded processor, PC, and FPGA data transfer (with Linus Tauro).</ul><hr><h2>Past Results</h2><ul><li> Definition of the SpecCharts language, a combination of VHDL and Statecharts, for simple and natural embedded system specification.<li> Development of the SpecSyn system-design tool, for rapid exploration of various hardware/software implementations and automatic refinement into a more detailed specification.</ul><hr><h2>Contact information</h2><ul><li> Computer Science, University of California, Riverside, CA 92521<li> (909) 787-4710, fax: 787-4643, email: vahid@cs.ucr.edu</ul><hr><h2>Publications</h2><!WA0><a href="http://www.cs.ucr.edu/publications"> Link to UCR CS publications</a><hr><h2>Other</h2><!WA1><a href="http://oneworld.wa.com/bahai"> Link to The Baha'i Faith WWW Page</a><hr><!WA2><a href="http://www.cs.ucr.edu/isss96/index.html"> <!WA3><img src="http://www.cs.ucr.edu/~vahid/newlogo.gif"> International Symposium on System Synthesis </a><hr><!WA4><a href="http://www.cs.ucr.edu/~vahid/web/index.html"> Prerequisite structure<hr><!WA5><a href="http://www.cs.ucr.edu/~vahid/myhtml.htm"> Excel test<hr><!WA6><a href="http://www.cs.ucr.edu/homes/faculty.html"><!WA7><img src="http://www.cs.ucr.edu/icons/back.xbm">Return to FacultyHome Page</a>
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