http:^^www.cns.caltech.edu^faculty^mead.html

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Date: Wed, 20 Nov 1996 22:21:26 GMTServer: NCSA/1.4.1Content-type: text/htmlLast-modified: Mon, 28 Nov 1994 20:20:24 GMTContent-length: 1729<html><head><title> Professor Carver Mead </title></head><body><!WA0><img src="http://www.cns.caltech.edu/Faculty/gifs/mead.gif" alt=""><h1> Carver Mead </h1><h2> Gordon and Betty Moore Professor of <!WA1><a href="http://www.caltech.edu/caltech/EandAS.html">Engineering and Applied Science</a> </h2>B.S. Caltech, 1956 <BR>M.S. Caltech, 1957 <BR>Ph.D. Caltech, 1960<p>Our <!WA2><a href="http://www.pcmp.caltech.edu/">laboratory</a> is dedicated to the creation of silicon models of specific areas of the nervous system. The rapid development of the Very Large Scale Integrated (VLSI) circuit technology has given us a medium in which it is currently possible to fabricate tens of millions of transistors interconnected on a single silicon wafer. Silicon is thus a medium in which structures of high complexity can be created.<p>Early experiments have shown that the elementary operations found in the nervous system can also be realized by analog circuits created with standard silicon fabrication technology. Many neural areas are organized as thin sheets, and carry two-dimensional representations of their computational space. These structures map well onto the two-dimensional silicon surface. In both neural and silicon technologies, the active devices (synapses and transistors) occupy no more than one or two percent of the space -- "wire" fills the entire remaining space. The limitation of connectivity in nervous tissue has clearly forced the computational structure into a particular form. If the required functions could be implemented with less wire, nature would have evolved superior creatures with more computations per unit brain area. The resulting optimization provides strong guidelines for the design of homologous silicon structures.<p>

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