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Date: Thu, 21 Nov 1996 20:03:17 GMT
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<title>Yang-Chang Hong's Home Page</title>
<h1>Yang-Chang Hong's Home Page</h1>
<!WA0><img src="http://www.cs.ucr.edu/~hong/hong.gif"><p>

<h2>EDUCATION AND WORK</h2>
<ul>
<li>B.S. degree in Electrical and Computer Engineering, Taiwan.
<li>Ph.D. in Computer Engineering, University of Florida, Gainsville.
<li>Member of the Institute of Information Science of Academia Sinica.
<li>Taught at Taiwan University, Taipei.
<li>Taught at University of Santa Clara, Santa Clara, California.
</ul>
<hr>
<h2>RESEARCH TOPICS</h2>
Dr. Hong's research focuses on a dataflow/von Neumann hybrid
architecture for efficient pipelined execution of dataflow program
graphs.  This includes the study of mechanisms for reducing the
scheduling gap between a dataflow instruction and its consumer
instruction(s), and the issues of partitioning and compilation
of the program graph to maximize the use of the normal "IP+1"
instruction scheduling of a von Neumann processor, where the IP
stands for instructional pointer.  Other research interests
include incorporation of dataflow ideas into RISC processors
for parallel execution, and study of the architecture of each node
in a general purpose, massively parallel architectures.<p>

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