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Date: Thu, 07 Nov 1996 19:07:05 GMTServer: NCSA/1.5Content-type: text/htmlLast-modified: Fri, 06 Sep 1996 22:37:49 GMTContent-length: 7398<HTML><HEAD><TITLE> Home Page of Charles N. Fischer </TITLE></HEAD><BODY><H1> <!WA0><!WA0><!WA0><!WA0><IMG ALIGN=left SRC="http://www.cs.wisc.edu/~fischer/fischer3.gif"><br><applet code=javex.class width=125 height=125 align=right><param name=BGCOLOR value="000000"><param name=FACECOLOR value="FFFFFF"><param name=SWEEPCOLOR value="FF0000"><param name=MINUTECOLOR value="000080"><param name=HOURCOLOR value="000080"><param name=TEXTCOLOR value="804010"><param name=CASECOLOR value="000080"><param name=TRIMCOLOR value="FF0000"><param name=LOGOSTRING value="Comp Sci"><param name=LOGOIMAGEURL value="w2.gif"><param name=TIMEZONE value="+5"></applet>      Charles N. Fischer<br>      Professor of Computer Sciences<br>      University of Wisconsin<br><br><br><br></H1><BLOCKQUOTE><br> <!WA1><!WA1><!WA1><!WA1><A HREF=" http://www.cs.wisc.edu/" > Computer Sciences Department </a> <BR> University of Wisconsin <BR> 1210 W. Dayton St. <BR> Madison, WI 53706-1685 <BR> <BR> Telephone: (608) 262-6635 <br> Messages: (608) 262-1204 <BR> Fax: (608) 262-9777 <BR> Email: <!WA2><!WA2><!WA2><!WA2><a href=mailto:fischer@cs.wisc.edu>fischer@cs.wisc.edu</a><BR></BLOCKQUOTE><P><!WA3><!WA3><!WA3><!WA3><img src="http://www.cs.wisc.edu/~fischer/cnf.images/rainline.gif"><P><h2> Teaching </h2><ul><li>This semester I'm teaching<!WA4><!WA4><!WA4><!WA4><A HREF=" http://www.cs.wisc.edu/~fischer/cs701.html" >CS 701,</a>the graduate course in compilers.<li>In the spring I'll be teaching<!WA5><!WA5><!WA5><!WA5><A HREF=" http://www.cs.wisc.edu/~fischer/cs536.html" >CS 536,</a>the undergraduate course in compilers.</ul><P><!WA6><!WA6><!WA6><!WA6><img src="http://www.cs.wisc.edu/~fischer/cnf.images/rainline.gif"><P><h2> Research </h2><p>My research interests focus on compiler design and implementation.Recently, I've been interested in how to best exploit the enormouscapabilities provided by modern computer architectures.Some of the issues my students and I have investigated include:<p><ul><li>Code scheduling is important to avoid unnecessary pipeline delays. We haveinvestigated issues in<!WA7><!WA7><!WA7><!WA7><a href="http://www.cs.wisc.edu/~fischer/cs701/inst.sched.ps"> <em>optimally</em> scheduling arithmetic expressions.</a><p><li>The dominant model for global (procedure-level) register allocation is graph coloring.Is this the best model?Maybe not.<!WA8><!WA8><!WA8><!WA8><a href="http://www.cs.wisc.edu/~fischer/cs701/prob.reg.ps">Other models </a>that explicitly quantify the likelihood and benefit of registerresidence are very attractive.<p><li>Careful register allocation is vital in generating code -- unnecessary loadsand stores must be avoided.The ultimate in register allocation is<em> interprocedural register allocation</em> in which <em>all</em> theprocedures of a program are analyzed.We have studied<!WA9><!WA9><!WA9><!WA9><a href="http://www.cs.wisc.edu/~fischer/cs701/kurlander.ps">interprocedural allocation models</a>that <em>optimally</em>allocate register among procedures in <em>polynomial</em> time.What's more, the approach seems to be effective in practice.<p><li>Anyone who codes in C or C++ knows how easy it is to make mistakes.Errors involving pointers and array indices are especially common.We have studied ways to<!WA10><!WA10><!WA10><!WA10><a href="http://www.cs.wisc.edu/~fischer/cs701/final.patil.spe.ps">automatically check <em>all</em> pointer and array operations </a>at run-time on shared-memory multiprocessor workstations.Using one processor to run a program and another to monitor the program,it is possible to routinely check programs as they execute, with little orno apparent slowdown.</ul><!WA11><!WA11><!WA11><!WA11><img src="http://www.cs.wisc.edu/~fischer/cnf.images/rainline.gif"><P><H2> Recent Publications </H2><ul><li><!WA12><!WA12><!WA12><!WA12><a href="http://www.cs.wisc.edu/~fischer/cs701/kurlander.ps">"Minimum Cost Interprocedural Register Allocation," </a>Steven M. Kurlander and Charles N. Fischer,<em>POPL '96: The 23rd ACM SIGPLAN-SIGACT Symposium on Principles of ProgrammingLanguages,</em>January, 1996.<p><li><!WA13><!WA13><!WA13><!WA13><a href="http://www.cs.wisc.edu/~fischer/cs701/final.patil.spe.ps">"Low-cost, Concurrent Checking of Pointer and Array Accesses in C Programs,"</a>Harish Patil and Charles N. Fischer,to appear in<em>Software--Practice and Experience.</em><p><li><!WA14><!WA14><!WA14><!WA14><a href="http://www.cs.wisc.edu/~fischer/cs701/prob.reg.ps"> "Demand-Driven Register Allocation,"</a>Todd A. Proebsting and Charles N. Fischer,to appear in<em>ACM Transactions on Programming Languages and Systems. </em><p><li><!WA15><!WA15><!WA15><!WA15><a href="http://www.cs.wisc.edu/~fischer/cs701/inst.sched.ps"> "Efficient Instruction Scheduling for Delayed-Load Architectures,"</a>Steven M. Kurlander, Todd A. Proebsting and Charles N. Fischer,<em>ACM Transactions on Programming Languages and Systems,</em>Vol 17, No. 5, 740-776, (1995).<p><li>"Zero-cost Range Splitting,"Steven M. Kurlander and Charles N. Fischer,<em>SIGPLAN '94 Conference on Programming Language Design and Implementation,</em>June, 1994.</ul><!WA16><!WA16><!WA16><!WA16><img src="http://www.cs.wisc.edu/~fischer/cnf.images/rainline.gif"><P><h2>Other Activities</h2><ul><li>A new, completely revised second edition of<!WA17><!WA17><!WA17><!WA17><a href="http://siesta.cs.wustl.edu/~cytron/cac/"> "Crafting a Compiler,"</a>co-authored with<!WA18><!WA18><!WA18><!WA18><a href="http://siesta.cs.wustl.edu/~cytron/"> Ron Cytron</a>and<!WA19><!WA19><!WA19><!WA19><a href="http://www.cc.gatech.edu/computing/SW_Eng/people/Faculty/Richard.LeBlanc.html"> Richard J. LeBlanc, Jr.</a>is almost complete.It will be published by<!WA20><!WA20><!WA20><!WA20><a href="http://www.aw.com/bc/home.html"> Benjamin/Cummings.</a>Look for it soon at better bookstores everywhere.<p><li>I am the "Short Communications" Editor for<!WA21><!WA21><!WA21><!WA21><a href="http://www.acm.org/toplas/"> ACM Transactions on Programming Languages and Systems</a>(TOPLAS).</ul><!WA22><!WA22><!WA22><!WA22><img src="http://www.cs.wisc.edu/~fischer/cnf.images/rainline.gif"><P><h2>Education</h2>Ph.D.,<!WA23><!WA23><!WA23><!WA23><a href="http://www.cornell.edu/"> Cornell University,</a>1974<br>"On Parsing Context-Free Languages in Parallel Environments,"<br>supervised by John H. Williams.<!WA24><!WA24><!WA24><!WA24><img src="http://www.cs.wisc.edu/~fischer/cnf.images/rainline.gif"><P><h2>Ph.D Students</h2><ol><li>Donn R. Milton,"Syntactic Specification and Analysis with Attributed Grammars,"July 1977.<p><li>Bruce R. Rowland,"Semantic Attribute Evaluation During Syntactic Analysis,"July 1977.<p><li>Stephen K. Skedzielewski,"Definition and Use of Attribute Reevaluation in Attributed Grammars,"September 1978.<p><li>Bernard A. Dion,"Locally Least-Cost Error Correctors for Context-Free and Context-SensitiveParsers,"December 1978.<p><li>Mahadevan Ganapathi,"Retargetable Code Generation and Optimization Using Attribute Grammars,"November 1980.<p><li>Vimal Begwami,"A New Approach for Attribute Evaluation and Error Correction in Compilers,"August 1982.<p><li>Jon Mauney,"Least-cost Syntactic Error Correction Using Extended Right Context,"January 1983.<p><li>Gregory F. Johnson,"Context Sensitive Attribute Flow,"August 1983.<p><li>Anil Pal,"Generating Execution Facilities for Integrated Programming Environments,"December 1986.<p><li>William H. Winsborough,"Automatic, Transparent Parallelization of Logic Programs at Compile Time,"August 1988.<p><li>G A Venkatesh,"A Framework for Specification and Implementation of Program Analysis Algorithms,"August 1989.<p><li><!WA25><!WA25><!WA25><!WA25><a href="http://www.cs.arizona.edu/people/todd/"> Todd A. Proebsting, </a>"Code Generation Techniques,"August 1992.<p><p><li>Steve Kurlander,"Approaches to Interprocedural Register Allocation,"January 1996.<p><li>Harish Patil,"Efficient Program Monitoring Techniques,"June 1996.</ol><!WA26><!WA26><!WA26><!WA26><img src="http://www.cs.wisc.edu/~fischer/cnf.images/rainline.gif"><P></BODY></HTML>⌨️ 快捷键说明
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