ds18b20.fit.summary
来自「基于VHDL写的DS18B20的驱动」· SUMMARY 代码 · 共 14 行
SUMMARY
14 行
Flow Status : Successful - Sun Jun 03 11:31:38 2007
Quartus II Version : 5.0 Build 148 04/26/2005 SJ Full Version
Revision Name : ds18b20
Top-level Entity Name : ds18b20
Family : Cyclone
Device : EP1C3T144C8
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 217 / 2,910 ( 7 % )
Total pins : 16 / 104 ( 15 % )
Total virtual pins : 0
Total memory bits : 1,024 / 59,904 ( 1 % )
Total PLLs : 0 / 1 ( 0 % )
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