ds18b20.map.eqn

来自「基于VHDL写的DS18B20的驱动」· EQN 代码 · 共 1,850 行 · 第 1/3 页

-- Copyright (C) 1991-2005 Altera Corporation
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--A1L261Q is ioout~reg0
--operation mode is normal

A1L261Q_lut_out = iodata;
A1L261Q = DFFEAS(A1L261Q_lut_out, clk, VCC, , , , , , );


--C1_q_a[0] is altsyncram:reduce_or_rtl_0|altsyncram_3rj:auto_generated|q_a[0]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 4
--Port A Input: Registered, Port A Output: Un-registered
C1_q_a[0]_PORT_A_address = BUS(A1L502, A1L602, A1L802, A1L902, A1L212, A1L312, A1L412, A1L512);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , C1_q_a[0]_clock_enable_0);
C1_q_a[0]_clock_0 = clk;
C1_q_a[0]_clock_enable_0 = !start;
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , C1_q_a[0]_clock_enable_0, , , );
C1_q_a[0] = C1_q_a[0]_PORT_A_data_out[0];


--C1_q_a[1] is altsyncram:reduce_or_rtl_0|altsyncram_3rj:auto_generated|q_a[1]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 4
--Port A Input: Registered, Port A Output: Un-registered
C1_q_a[1]_PORT_A_address = BUS(A1L502, A1L602, A1L802, A1L902, A1L212, A1L312, A1L412, A1L512);
C1_q_a[1]_PORT_A_address_reg = DFFE(C1_q_a[1]_PORT_A_address, C1_q_a[1]_clock_0, , , C1_q_a[1]_clock_enable_0);
C1_q_a[1]_clock_0 = clk;
C1_q_a[1]_clock_enable_0 = !start;
C1_q_a[1]_PORT_A_data_out = MEMORY(, , C1_q_a[1]_PORT_A_address_reg, , , , , , C1_q_a[1]_clock_0, , C1_q_a[1]_clock_enable_0, , , );
C1_q_a[1] = C1_q_a[1]_PORT_A_data_out[0];


--C1_q_a[2] is altsyncram:reduce_or_rtl_0|altsyncram_3rj:auto_generated|q_a[2]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 4
--Port A Input: Registered, Port A Output: Un-registered
C1_q_a[2]_PORT_A_address = BUS(A1L502, A1L602, A1L802, A1L902, A1L212, A1L312, A1L412, A1L512);
C1_q_a[2]_PORT_A_address_reg = DFFE(C1_q_a[2]_PORT_A_address, C1_q_a[2]_clock_0, , , C1_q_a[2]_clock_enable_0);
C1_q_a[2]_clock_0 = clk;
C1_q_a[2]_clock_enable_0 = !start;
C1_q_a[2]_PORT_A_data_out = MEMORY(, , C1_q_a[2]_PORT_A_address_reg, , , , , , C1_q_a[2]_clock_0, , C1_q_a[2]_clock_enable_0, , , );
C1_q_a[2] = C1_q_a[2]_PORT_A_data_out[0];


--C1_q_a[3] is altsyncram:reduce_or_rtl_0|altsyncram_3rj:auto_generated|q_a[3]
--RAM Block Operation Mode: ROM
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 4
--Port A Input: Registered, Port A Output: Un-registered
C1_q_a[3]_PORT_A_address = BUS(A1L502, A1L602, A1L802, A1L902, A1L212, A1L312, A1L412, A1L512);
C1_q_a[3]_PORT_A_address_reg = DFFE(C1_q_a[3]_PORT_A_address, C1_q_a[3]_clock_0, , , C1_q_a[3]_clock_enable_0);
C1_q_a[3]_clock_0 = clk;
C1_q_a[3]_clock_enable_0 = !start;
C1_q_a[3]_PORT_A_data_out = MEMORY(, , C1_q_a[3]_PORT_A_address_reg, , , , , , C1_q_a[3]_clock_0, , C1_q_a[3]_clock_enable_0, , , );
C1_q_a[3] = C1_q_a[3]_PORT_A_data_out[0];


--tl[7] is tl[7]
--operation mode is normal

tl[7]_lut_out = A1L502;
tl[7] = DFFEAS(tl[7]_lut_out, clk, VCC, , !start, , , , );


--tl[5] is tl[5]
--operation mode is normal

tl[5]_lut_out = A1L802;
tl[5] = DFFEAS(tl[5]_lut_out, clk, VCC, , !start, , , , );


--th[1] is th[1]
--operation mode is normal

th[1]_lut_out = A1L412;
th[1] = DFFEAS(th[1]_lut_out, clk, VCC, , !start, , , , );


--th[0] is th[0]
--operation mode is normal

th[0]_lut_out = A1L512;
th[0] = DFFEAS(th[0]_lut_out, clk, VCC, , !start, , , , );


--A1L742 is reduce_or~102
--operation mode is normal

A1L742 = tl[7] & !tl[5] & !th[1] & th[0] # !tl[7] & tl[5] & th[1] & !th[0];


--tl[6] is tl[6]
--operation mode is normal

tl[6]_lut_out = A1L602;
tl[6] = DFFEAS(tl[6]_lut_out, clk, VCC, , !start, , , , );


--th[3] is th[3]
--operation mode is normal

th[3]_lut_out = A1L212;
th[3] = DFFEAS(th[3]_lut_out, clk, VCC, , !start, , , , );


--th[2] is th[2]
--operation mode is normal

th[2]_lut_out = A1L312;
th[2] = DFFEAS(th[2]_lut_out, clk, VCC, , !start, , , , );


--A1L842 is reduce_or~103
--operation mode is normal

A1L842 = A1L742 & tl[6] & !th[3] & !th[2];


--tl[0] is tl[0]
--operation mode is normal

tl[0]_lut_out = ioin;
tl[0] = DFFEAS(tl[0]_lut_out, clk, VCC, , A1L672, , , , );


--tl[1] is tl[1]
--operation mode is normal

tl[1]_lut_out = ioin;
tl[1] = DFFEAS(tl[1]_lut_out, clk, VCC, , A1L872, , , , );


--tl[2] is tl[2]
--operation mode is normal

tl[2]_lut_out = ioin;
tl[2] = DFFEAS(tl[2]_lut_out, clk, VCC, , A1L082, , , , );


--tl[3] is tl[3]
--operation mode is normal

tl[3]_lut_out = ioin;
tl[3] = DFFEAS(tl[3]_lut_out, clk, VCC, , A1L282, , , , );


--iodata is iodata
--operation mode is normal

iodata_lut_out = A1L712 # A1L812 # A1L832 & A1L592;
iodata = DFFEAS(iodata_lut_out, clk, !start, , A1L622, , , , );


--bitNum[1] is bitNum[1]
--operation mode is normal

bitNum[1]_lut_out = A1L1 & (bitNum[31] # !A1L691);
bitNum[1] = DFFEAS(bitNum[1]_lut_out, clk, !start, , A1L39, , , , );


--dt[9] is dt[9]
--operation mode is arithmetic

dt[9]_carry_eqn = A1L921;
dt[9]_lut_out = dt[9] $ (dt[9]_carry_eqn);
dt[9] = DFFEAS(dt[9]_lut_out, clk, !start, , A1L751, , , A1L651, );

--A1L131 is dt[9]~3179
--operation mode is arithmetic

A1L131 = CARRY(!A1L921 # !dt[9]);


--dt[10] is dt[10]
--operation mode is arithmetic

dt[10]_carry_eqn = A1L131;
dt[10]_lut_out = dt[10] $ (!dt[10]_carry_eqn);
dt[10] = DFFEAS(dt[10]_lut_out, clk, !start, , A1L751, , , A1L651, );

--A1L331 is dt[10]~3183
--operation mode is arithmetic

A1L331 = CARRY(dt[10] & (!A1L131));


--A1L361 is LessThan~2835
--operation mode is normal

A1L361 = !dt[9] & !dt[10];


--dt[5] is dt[5]
--operation mode is arithmetic

dt[5]_carry_eqn = A1L121;
dt[5]_lut_out = dt[5] $ (dt[5]_carry_eqn);
dt[5] = DFFEAS(dt[5]_lut_out, clk, !start, , A1L751, , , A1L651, );

--A1L321 is dt[5]~3187
--operation mode is arithmetic

A1L321 = CARRY(!A1L121 # !dt[5]);


--dt[6] is dt[6]
--operation mode is arithmetic

dt[6]_carry_eqn = A1L321;
dt[6]_lut_out = dt[6] $ (!dt[6]_carry_eqn);
dt[6] = DFFEAS(dt[6]_lut_out, clk, !start, , A1L751, , , A1L651, );

--A1L521 is dt[6]~3191
--operation mode is arithmetic

A1L521 = CARRY(dt[6] & (!A1L321));


--dt[7] is dt[7]
--operation mode is arithmetic

dt[7]_carry_eqn = A1L521;
dt[7]_lut_out = dt[7] $ (dt[7]_carry_eqn);
dt[7] = DFFEAS(dt[7]_lut_out, clk, !start, , A1L751, , , A1L651, );

--A1L721 is dt[7]~3195
--operation mode is arithmetic

A1L721 = CARRY(!A1L521 # !dt[7]);


--A1L461 is LessThan~2836
--operation mode is normal

A1L461 = !dt[5] & !dt[6] & !dt[7];


--dt[3] is dt[3]
--operation mode is arithmetic

dt[3]_carry_eqn = A1L711;
dt[3]_lut_out = dt[3] $ (dt[3]_carry_eqn);
dt[3] = DFFEAS(dt[3]_lut_out, clk, !start, , A1L751, , , A1L651, );

--A1L911 is dt[3]~3199
--operation mode is arithmetic

A1L911 = CARRY(!A1L711 # !dt[3]);


--dt[4] is dt[4]
--operation mode is arithmetic

dt[4]_carry_eqn = A1L911;
dt[4]_lut_out = dt[4] $ (!dt[4]_carry_eqn);
dt[4] = DFFEAS(dt[4]_lut_out, clk, !start, , A1L751, , , A1L651, );

--A1L121 is dt[4]~3203
--operation mode is arithmetic

A1L121 = CARRY(dt[4] & (!A1L911));


--A1L561 is LessThan~2837
--operation mode is normal

A1L561 = dt[3] & dt[4];


--dt[8] is dt[8]
--operation mode is arithmetic

dt[8]_carry_eqn = A1L721;
dt[8]_lut_out = dt[8] $ (!dt[8]_carry_eqn);
dt[8] = DFFEAS(dt[8]_lut_out, clk, !start, , A1L751, , , A1L651, );

--A1L921 is dt[8]~3207
--operation mode is arithmetic

A1L921 = CARRY(dt[8] & (!A1L721));


--A1L661 is LessThan~2838
--operation mode is normal

A1L661 = A1L361 & (A1L461 & !A1L561 # !dt[8]);


--dt[11] is dt[11]
--operation mode is arithmetic

dt[11]_carry_eqn = A1L331;
dt[11]_lut_out = dt[11] $ (dt[11]_carry_eqn);
dt[11] = DFFEAS(dt[11]_lut_out, clk, !start, , A1L751, , , A1L651, );

--A1L531 is dt[11]~3211
--operation mode is arithmetic

A1L531 = CARRY(!A1L331 # !dt[11]);


--dt[12] is dt[12]
--operation mode is arithmetic

dt[12]_carry_eqn = A1L531;
dt[12]_lut_out = dt[12] $ (!dt[12]_carry_eqn);
dt[12] = DFFEAS(dt[12]_lut_out, clk, !start, , A1L751, , , A1L651, );

--A1L731 is dt[12]~3215
--operation mode is arithmetic

A1L731 = CARRY(dt[12] & (!A1L531));


--A1L761 is LessThan~2839
--operation mode is normal

A1L761 = A1L661 & (!dt[11] & !dt[12]);


--dt[14] is dt[14]
--operation mode is normal

dt[14]_carry_eqn = A1L931;
dt[14]_lut_out = dt[14] $ (!dt[14]_carry_eqn);
dt[14] = DFFEAS(dt[14]_lut_out, clk, !start, , A1L751, , , A1L651, );


--dt[13] is dt[13]
--operation mode is arithmetic

dt[13]_carry_eqn = A1L731;
dt[13]_lut_out = dt[13] $ (dt[13]_carry_eqn);
dt[13] = DFFEAS(dt[13]_lut_out, clk, !start, , A1L751, , , A1L651, );

--A1L931 is dt[13]~3223
--operation mode is arithmetic

A1L931 = CARRY(!A1L731 # !dt[13]);


--bitNum[30] is bitNum[30]
--operation mode is normal

bitNum[30]_lut_out = A1L3 & (bitNum[31] # !A1L691);
bitNum[30] = DFFEAS(bitNum[30]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[29] is bitNum[29]
--operation mode is normal

bitNum[29]_lut_out = A1L5 & (bitNum[31] # !A1L691);
bitNum[29] = DFFEAS(bitNum[29]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[28] is bitNum[28]
--operation mode is normal

bitNum[28]_lut_out = A1L7 & (bitNum[31] # !A1L691);
bitNum[28] = DFFEAS(bitNum[28]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[27] is bitNum[27]
--operation mode is normal

bitNum[27]_lut_out = A1L9 & (bitNum[31] # !A1L691);
bitNum[27] = DFFEAS(bitNum[27]_lut_out, clk, !start, , A1L39, , , , );


--A1L861 is LessThan~2840
--operation mode is normal

A1L861 = bitNum[30] # bitNum[29] # bitNum[28] # bitNum[27];


--bitNum[26] is bitNum[26]
--operation mode is normal

bitNum[26]_lut_out = A1L11 & (bitNum[31] # !A1L691);
bitNum[26] = DFFEAS(bitNum[26]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[25] is bitNum[25]
--operation mode is normal

bitNum[25]_lut_out = A1L31 & (bitNum[31] # !A1L691);
bitNum[25] = DFFEAS(bitNum[25]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[24] is bitNum[24]
--operation mode is normal

bitNum[24]_lut_out = A1L51 & (bitNum[31] # !A1L691);
bitNum[24] = DFFEAS(bitNum[24]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[23] is bitNum[23]
--operation mode is normal

bitNum[23]_lut_out = A1L71 & (bitNum[31] # !A1L691);
bitNum[23] = DFFEAS(bitNum[23]_lut_out, clk, !start, , A1L39, , , , );


--A1L961 is LessThan~2841
--operation mode is normal

A1L961 = bitNum[26] # bitNum[25] # bitNum[24] # bitNum[23];


--bitNum[22] is bitNum[22]
--operation mode is normal

bitNum[22]_lut_out = A1L91 & (bitNum[31] # !A1L691);
bitNum[22] = DFFEAS(bitNum[22]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[21] is bitNum[21]
--operation mode is normal

bitNum[21]_lut_out = A1L12 & (bitNum[31] # !A1L691);
bitNum[21] = DFFEAS(bitNum[21]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[20] is bitNum[20]
--operation mode is normal

bitNum[20]_lut_out = A1L32 & (bitNum[31] # !A1L691);
bitNum[20] = DFFEAS(bitNum[20]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[19] is bitNum[19]
--operation mode is normal

bitNum[19]_lut_out = A1L52 & (bitNum[31] # !A1L691);
bitNum[19] = DFFEAS(bitNum[19]_lut_out, clk, !start, , A1L39, , , , );


--A1L071 is LessThan~2842
--operation mode is normal

A1L071 = bitNum[22] # bitNum[21] # bitNum[20] # bitNum[19];


--bitNum[18] is bitNum[18]
--operation mode is normal

bitNum[18]_lut_out = A1L72 & (bitNum[31] # !A1L691);
bitNum[18] = DFFEAS(bitNum[18]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[17] is bitNum[17]
--operation mode is normal

bitNum[17]_lut_out = A1L92 & (bitNum[31] # !A1L691);
bitNum[17] = DFFEAS(bitNum[17]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[16] is bitNum[16]
--operation mode is normal

bitNum[16]_lut_out = A1L13 & (bitNum[31] # !A1L691);
bitNum[16] = DFFEAS(bitNum[16]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[15] is bitNum[15]
--operation mode is normal

bitNum[15]_lut_out = A1L33 & (bitNum[31] # !A1L691);
bitNum[15] = DFFEAS(bitNum[15]_lut_out, clk, !start, , A1L39, , , , );


--A1L171 is LessThan~2843
--operation mode is normal

A1L171 = bitNum[18] # bitNum[17] # bitNum[16] # bitNum[15];


--A1L271 is LessThan~2844
--operation mode is normal

A1L271 = A1L861 # A1L961 # A1L071 # A1L171;


--bitNum[14] is bitNum[14]
--operation mode is normal

bitNum[14]_lut_out = A1L53 & (bitNum[31] # !A1L691);
bitNum[14] = DFFEAS(bitNum[14]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[13] is bitNum[13]
--operation mode is normal

bitNum[13]_lut_out = A1L73 & (bitNum[31] # !A1L691);
bitNum[13] = DFFEAS(bitNum[13]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[12] is bitNum[12]
--operation mode is normal

bitNum[12]_lut_out = A1L93 & (bitNum[31] # !A1L691);
bitNum[12] = DFFEAS(bitNum[12]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[11] is bitNum[11]
--operation mode is normal

bitNum[11]_lut_out = A1L14 & (bitNum[31] # !A1L691);
bitNum[11] = DFFEAS(bitNum[11]_lut_out, clk, !start, , A1L39, , , , );


--A1L371 is LessThan~2845
--operation mode is normal

A1L371 = bitNum[14] # bitNum[13] # bitNum[12] # bitNum[11];


--bitNum[10] is bitNum[10]
--operation mode is normal

bitNum[10]_lut_out = A1L34 & (bitNum[31] # !A1L691);
bitNum[10] = DFFEAS(bitNum[10]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[9] is bitNum[9]
--operation mode is normal

bitNum[9]_lut_out = A1L54 & (bitNum[31] # !A1L691);
bitNum[9] = DFFEAS(bitNum[9]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[8] is bitNum[8]
--operation mode is normal

bitNum[8]_lut_out = A1L74 & (bitNum[31] # !A1L691);
bitNum[8] = DFFEAS(bitNum[8]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[7] is bitNum[7]
--operation mode is normal

bitNum[7]_lut_out = A1L94 & (bitNum[31] # !A1L691);
bitNum[7] = DFFEAS(bitNum[7]_lut_out, clk, !start, , A1L39, , , , );


--A1L471 is LessThan~2846
--operation mode is normal

A1L471 = bitNum[10] # bitNum[9] # bitNum[8] # bitNum[7];


--bitNum[6] is bitNum[6]
--operation mode is normal

bitNum[6]_lut_out = A1L15 & (bitNum[31] # !A1L691);
bitNum[6] = DFFEAS(bitNum[6]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[5] is bitNum[5]
--operation mode is normal

bitNum[5]_lut_out = A1L35 & (bitNum[31] # !A1L691);
bitNum[5] = DFFEAS(bitNum[5]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[4] is bitNum[4]
--operation mode is normal

bitNum[4]_lut_out = A1L55 & (bitNum[31] # !A1L691);
bitNum[4] = DFFEAS(bitNum[4]_lut_out, clk, !start, , A1L39, , , , );


--bitNum[3] is bitNum[3]
--operation mode is normal

bitNum[3]_lut_out = A1L75 & (bitNum[31] # !A1L691);
bitNum[3] = DFFEAS(bitNum[3]_lut_out, clk, !start, , A1L39, , , , );


--A1L571 is LessThan~2847
--operation mode is normal

A1L571 = bitNum[6] # bitNum[5] # bitNum[4] # bitNum[3];


--A1L671 is LessThan~2848
--operation mode is normal

A1L671 = A1L471 # A1L571;


--bitNum[31] is bitNum[31]
--operation mode is normal

bitNum[31]_lut_out = A1L39 & A1L95 & (bitNum[31] # !A1L691) # !A1L39 & bitNum[31];
bitNum[31] = DFFEAS(bitNum[31]_lut_out, clk, !start, , , , , , );


--A1L771 is LessThan~2849
--operation mode is normal

A1L771 = !bitNum[31] & (A1L271 # A1L371 # A1L671);