ds18b20.vhd

来自「基于VHDL写的DS18B20的驱动」· VHDL 代码 · 共 203 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity ds18b20 is
	port(start: in std_logic;
		 ioout: out std_logic;
		 ioin:  in	std_logic;
		 clk:in std_logic;
		 thout: out std_logic_vector(3 downto 0);
		 tlout: out std_logic_vector(3 downto 0);
		 tdout: out std_logic_vector(3 downto 0)
		);
end ds18b20;
architecture behave of ds18b20 is
	signal iodata:std_logic;
	signal dt:integer range 0 to 20001;
	signal isstart:std_logic;
	signal s:std_logic_vector(2 downto 0);
	signal s2:integer range 0 to 3;
	signal writebyte:std_logic_vector(7 downto 0);
	signal bitNum:integer;
	signal th:std_logic_vector(7 downto 0);
	
	signal tl:std_logic_vector(7 downto 0);
	signal tpout:std_logic_vector(7 downto 0);
	signal tp:std_logic_vector(7 downto 0);
	
begin
	process(s,start,clk) 
	begin
		if (start='1') then
			s<="111";
			s2<=0;
			dt<=0;
			iodata<='0';
			bitnum<=0;
		elsif (clk'event and clk='1') then
			case s is
			when "111"=>
				if (dt<20000) then
					iodata<='1';
					dt<=dt+1;
				else dt<=0;
					 s<="000";
				end if;
			when "000"=>               --复位
				if (dt<10000) then
					iodata<='0';
					dt<=dt+1;
					else if (dt<10800) then
						iodata<='1';
						dt<=dt+1;
					else if (dt<20000) then
						iodata<='Z';
						dt<=dt+1;
						else dt<=0;
							s<="001";
							end if;
					end if;
				end if;
				
			when "001"=>		
				if s2=0 then writebyte<="11001100"; end if;	--写入0XCC,SKIP ROM
				if s2=1 then writebyte<="01000100"; end if;	--写入0X44,CONVERT
				if s2=2 then writebyte<="11001100"; end if;	--写入0XCC,SKIP ROM
				if s2=3 then writebyte<="10111110"; end if;	--写入0XBE,READ RAM
				if bitnum<8 then
					if (dt<200) then
						iodata<='0';
						dt<=dt+1;
					else if (dt<1200) then
						iodata<=writebyte(bitnum);
						dt<=dt+1;
						else if (dt<1300) then
							iodata<='1';
							dt<=dt+1;
						else if (dt<1400) then
							iodata<='Z';
							dt<=dt+1;
							else dt<=0;
								 bitnum<=bitnum+1;
							end if;
						end if;
						end if;
					end if;
				else 	bitnum<=0;
						if s2=0 then s2<=1;
						elsif s2=1 then s<="010";
						elsif s2=2 then s2<=3;
						elsif s2=3 then s<="011";
						end if;
				end if;
				
			when "010"=>							--wait for convert
				if (dt<20000) then
					dt<=dt+1;
				else dt<=0;
					 s2<=2;
					 s<="111";
				end if;
				
			when "011"=>							--read temper_L
				if (bitnum<8) then
					if (dt<60) then
						iodata<='0';
						dt<=dt+1;
					else if (dt<80) then
						iodata<='Z';
						dt<=dt+1;
						else if (dt<280) then
							tl(bitnum)<=ioin;
							dt<=dt+1;
							else if (dt<1300) then
									iodata<='1';
									dt<=dt+1;
							else if (dt<1400) then
									iodata<='Z';
									dt<=dt+1;
								else  dt<=0;
								  bitnum<=bitnum+1;
								end if;
								end if;
							end if;
						end if;
					end if;
				else 	bitnum<=0;
						s<="100";
				end if;
			
			when "100"=>					--read temper_H
				if bitnum<8 then
					if (dt<60) then
						iodata<='0';
						dt<=dt+1;
					else if (dt<80) then
						iodata<='Z';
						dt<=dt+1;
						else if (dt<280) then
							th(bitnum)<=ioin;
							dt<=dt+1;
							else if (dt<1300) then
									iodata<='1';
									dt<=dt+1;
							else if (dt<1400) then
									iodata<='Z';
									dt<=dt+1;
								else  dt<=0;
								  bitnum<=bitnum+1;
								end if;
								end if;
							end if;
						end if;
					end if;
				else 	bitnum<=0;
						s2<=0;
						s<="111";
				end if;
				
			when others=>
				s<="111";				
			end case;
			
		end if;
	end process;
	
	process(clk)
	begin 
		if (clk'event and clk='1') then
		ioout<=iodata;
		end if;
	end process;
	
	tp(7 downto 4) <=th(3 downto 0);
	tp(3 downto 0) <=tl(7 downto 4);
	with tp select
		tpout<= "00100000" when "00010100",
				"00100001" when "00010101",
				"00100010" when "00010110",
				"00100011" when "00010111",
				"00100100" when "00011000",
				"00100101" when "00011001",
				"00100110" when "00011010",
				"00100111" when "00011011",
				"00101000" when "00011100",
				"00101001" when "00011101",
				
				"00110000" when "00011110",
				"00110001" when "00011111",
				"00110010" when "00100000",
				"00110011" when "00100001",
				"00110100" when "00100010",
				"00110101" when "00100011",
				"00110110" when "00100100",
				"00110111" when "00100101",
				"00111000" when "00100110",
				"00111001" when "00100111",
				"00110111" when others;		
		
	thout<=tpout(7 downto 4);
	tlout<=tpout(3 downto 0);
	tdout<=tl(3 downto 0);	
end behave;