cmx990_reg.h

CMX990 demonstration board (DE9901)

/****h* DE9901/cmx990_reg.h
* COPYRIGHT
*  (c) 2004-2005 Mobitex Technology AB - All rights reserved
* 
*  Redistribution and use in source and binary forms, with or without modification,
*  are permitted provided that the following conditions are met:
*  * 1. Redistributions of source code must retain the above copyright notice,
*       this list of conditions and the following disclaimer. 
*  * 2. Redistributions in binary form must reproduce the above copyright notice,
*       this list of conditions and the following disclaimer in the documentation
*       and/or other materials provided with the distribution.
*  * 3. The name Mobitex Technology AB may not be used to endorse or promote products
*       derived from this software without specific prior written permission.
*
*  THIS SOFTWARE IS PROVIDED BY MOBITEX TECHNOLOGY AB "AS IS" AND ANY EXPRESS OR
*  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
*  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
*  SHALL MOBITEX TECHNOLOGY AB BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
*  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
*  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
*  OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
*  WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
*  OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
*  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* AUTHOR
*  MPN/Kjell Westerberg
* HISTORY
*  Changes in the file are recorded in this list.
*   Ver:  Date:       Responsible:         Comment:
*   R1A01 2005-01-17  Kjell Westerberg     Approved.
*   R1A06 2005-04-08  Kjell Westerberg     Changed CMX_RX_IF_SUMMER defines.
*   R1A08 2005-08-02  Kjell Westerberg     Adapted for rev C of CMX990.
* DESCRIPTION
*  Define registers and bits for the CMX990 radio chip.
***/

#ifndef CMX990_REG_H
#define CMX990_REG_H

#include "atmel_reg.h"

/* Addresses to Registers in CMX chip */
#define CMX_DATABUFF      CMX_BASE + 0x00
#define CMX_COMMAND       CMX_BASE + 0x01
#define CMX_STATUS1       CMX_BASE + 0x01
#define CMX_CONTROL       CMX_BASE + 0x02
#define CMX_DATAQUALITY   CMX_BASE + 0x02
#define CMX_MODE          CMX_BASE + 0x03
#define CMX_STATUS2       CMX_BASE + 0x03
#define CMX_POWERUP1      CMX_BASE + 0x04
#define CMX_FREQ_OFFSET   CMX_BASE + 0x04
#define CMX_POWERUP2      CMX_BASE + 0x05
#define CMX_RSSI_REG      CMX_BASE + 0x05
#define CMX_ADC0_MSB      CMX_BASE + 0x08
#define CMX_ADC0_LSB      CMX_BASE + 0x09
#define CMX_DAC0_MSB      CMX_BASE + 0x08
#define CMX_DAC0_LSB      CMX_BASE + 0x09
#define CMX_ADC1_MSB      CMX_BASE + 0x0a
#define CMX_ADC1_LSB      CMX_BASE + 0x0b
#define CMX_DAC1_MSB      CMX_BASE + 0x0a
#define CMX_DAC1_LSB      CMX_BASE + 0x0b
#define CMX_ADC2_MSB      CMX_BASE + 0x0c
#define CMX_ADC2_LSB      CMX_BASE + 0x0d
#define CMX_DAC2_MSB      CMX_BASE + 0x0c
#define CMX_DAC2_LSB      CMX_BASE + 0x0d
#define CMX_ADC3_MSB      CMX_BASE + 0x0e
#define CMX_ADC3_LSB      CMX_BASE + 0x0f
#define CMX_DAC3_MSB      CMX_BASE + 0x0e
#define CMX_DAC3_LSB      CMX_BASE + 0x0f
#define CMX_ADC4_MSB      CMX_BASE + 0x10
#define CMX_ADC4_LSB      CMX_BASE + 0x11
#define CMX_RAMDAC_CTRL   CMX_BASE + 0x10
#define CMX_ADC5_MSB      CMX_BASE + 0x12
#define CMX_ADC5_LSB      CMX_BASE + 0x13
#define CMX_ADC_CTRL1     CMX_BASE + 0x11
#define CMX_ADC_CTRL2     CMX_BASE + 0x12
#define CMX_RAM1_MSB      CMX_BASE + 0x13
#define CMX_RAM1_LSB      CMX_BASE + 0x14
#define CMX_RAM2_MSB      CMX_BASE + 0x15
#define CMX_RAM2_LSB      CMX_BASE + 0x16
#define CMX_RXOFFSET_I    CMX_BASE + 0x18
#define CMX_RXOFFSET_Q    CMX_BASE + 0x19
#define CMX_YB_COMMAND    CMX_BASE + 0x1c
#define CMX_YB_DATA_MSB   CMX_BASE + 0x1d
#define CMX_YB_DATA_LSB   CMX_BASE + 0x1e
#define CMX_HW_TEST       CMX_BASE + 0x1f
#define CMX_MAIN_M_MSB    CMX_BASE + 0x20
#define CMX_MAIN_M_LSB    CMX_BASE + 0x21
#define CMX_MAIN_N_MSB    CMX_BASE + 0x22
#define CMX_MAIN_N_NSB    CMX_BASE + 0x23
#define CMX_MAIN_N_LSB    CMX_BASE + 0x24
#define CMX_AUX_M_MSB     CMX_BASE + 0x25
#define CMX_AUX_M_LSB     CMX_BASE + 0x26
#define CMX_AUX_N_MSB     CMX_BASE + 0x27
#define CMX_AUX_N_LSB     CMX_BASE + 0x28
#define CMX_MAIN_ADCDAC_TEST CMX_BASE + 0x3c
#define CMX_HW_TESTACCESS_0  CMX_BASE + 0x3d
#define CMX_HW_TESTACCESS_1  CMX_BASE + 0x3e
#define CMX_HW_TESTACCESS_2  CMX_BASE + 0x3f

#define CMX_MAX_REG_ADDR  0x3f

/* Bits in Command Register (WRITE) */
#define CMX_RXTASK_NULL   0x00
#define CMX_RXTASK_SFH    0x01
#define CMX_RXTASK_R3H    0x02
#define CMX_RXTASK_RDB    0x03
#define CMX_RXTASK_SFS    0x04
#define CMX_RXTASK_RSB    0x05
#define CMX_RXTASK_LFSB   0x06
#define CMX_RXTASK_RESET  0x07
#define CMX_RXTASK_SFHZ   0x09
#define CMX_RXTASK_RSD    0x0b
#define CMX_RXTASK_SFSZ   0x0c

#define CMX_TXTASK_NULL   0x00
#define CMX_TXTASK_T7H    0x01
#define CMX_TXTASK_TDB    0x03
#define CMX_TXTASK_TQB    0x04
#define CMX_TXTASK_TSB    0x05
#define CMX_TXTASK_TSO    0x06
#define CMX_TXTASK_RESET  0x07
#define CMX_TXTASK_TSD    0x0b

#define CMX_AQBC          0x80
#define CMX_AQIQ          0x40
#define CMX_AQAFC         0x20
#define CMX_PACKETDET     0x10


/* Bits in Control Register (WRITE) */
#define CMX_AGC_MAX_HOLD  0x00
#define CMX_AGC_HOLD      0x40
#define CMX_AGC_RUN       0x80
#define CMX_AGC_MAX_RUN   0xc0
#define CMX_IQ_RESET      0x00
#define CMX_IQ_HOLD       0x10
#define CMX_IQ_FINE       0x20
#define CMX_IQ_COARSE     0x30
#define CMX_AFC_RESET     0x00
#define CMX_AFC_HOLD      0x04
#define CMX_AFC_SLOW      0x08
#define CMX_AFC_FAST      0x0c
#define CMX_PLL_HOLD      0x00
#define CMX_PLL_NARROW    0x01
#define CMX_PLL_MEDIUM    0x02
#define CMX_PLL_WIDE      0x03


/* Bits in Mode Register (WRITE) */
#define CMX_IRQEN         0x80
#define CMX_INVBIT        0x40
#define CMX_TXRXN         0x20
#define CMX_SCREN         0x10
#define CMX_PLL_IRQEN     0x08
#define CMX_DQ_IRQEN      0x04
#define CMX_ADC_EN        0x02
#define CMX_DAC_EN        0x01


/* Bits in Power Up 1 Register (WRITE) */
#define CMX_CLOCK         0x80
#define CMX_BASEBAND      0x40
#define CMX_VREG          0x20
#define CMX_OP12          0x10
#define CMX_RXIF          0x08
#define CMX_RXRF1         0x04
#define CMX_RXRF2         0x02
#define CMX_TXRFIF        0x01


/* Bits in Power Up 2 Register (WRITE) */
#define CMX_DAC3          0x80
#define CMX_DAC2          0x40
#define CMX_DAC1          0x20
#define CMX_DAC0          0x10
#define CMX_RESET         0x08
#define CMX_LNA           0x04
#define CMX_PREREG        0x02
#define CMX_VBIAS         0x01

/* Bits in RamDac control (WRITE) */
#define CMX_EN_RAM_DAC    0x01
#define CMX_EN_AUTO_CYCLE 0x02
#define CMX_SCAN_DIR      0x04
#define CMX_RAM_RATE_1024 0x00
#define CMX_RAM_RATE_512  0x08
#define CMX_RAM_RATE_256  0x10
#define CMX_RAM_RATE_128  0x18
#define CMX_RAM_RATE_64   0x20
#define CMX_RAM_RATE_32   0x28
#define CMX_RAM_RATE_16   0x30
#define CMX_RAM_RATE_8    0x38
#define CMX_EN_RAM_ACCESS 0x40
#define CMX_INC_RAM_ADDR  0x80

/* Bits in Aux control 1 (WRITE) */
#define CMX_EN_ADC0       0x01
#define CMX_EN_ADC1       0x02
#define CMX_EN_ADC2       0x04
#define CMX_EN_ADC3       0x08
#define CMX_EN_ADC4       0x10
#define CMX_EN_ADC5       0x20

/* Bits in Aux control 2 (WRITE) */

/* Analogue setup 1 (WRITE) */
#define CMX_TX_ATT_10DB	0xC0
#define CMX_TX_ATT_15DB	0x80
#define CMX_TX_ATT_25DB	0x40
#define CMX_TX_ATT_35DB	0x00

/* Enable bit for main and aux PLL */
#define CMX_PLL_ENABLE 0x8000

/* Bits in Main PLL M register (WRITE)*/
#define CMX_TX_LO_DIV2 0
#define CMX_TX_LO_DIV1 0x4000

#define CMX_TX_MIX_FILTER_HIGH 0x2000
#define CMX_TX_MIX_FILTER_LOW 0x0000

/* Bits in Main PLL N register (WRITE) */
#define CMX_RX_IF_SUMMER_POS 0
#define CMX_RX_IF_SUMMER_NEG 0x800000

#define CMX_TX_VCO_CHARGE_HALF 0x100000
#define CMX_TX_VCO_CHARGE_NONE 0

#define CMX_TX_SLOPE_POS 0
#define CMX_TX_SLOPE_NEG 0x800000

/* TX IF Filter: 0x0 = 90 MHz */
/* 0x20 = 80 MHz */
/* 0x40 = 45 MHz */
/* 0x60 = 40 MHz */
#define CMX_TX_IF_FILTER_90 0x0000
#define CMX_TX_IF_FILTER_80 0x2000
#define CMX_TX_IF_FILTER_45 0x4000
#define CMX_TX_IF_FILTER_40 0x6000

/* Bits in Aux PLL N register (WRITE) */
#define CMX_TX_IF_DIV1  0x0000
#define CMX_TX_IF_DIV2  0x8000

/* Bits in Status Register 1 (READ) */
#define CMX_IRQ           0x80
#define CMX_BFREE         0x40
#define CMX_IBEMPTY       0x20
#define CMX_DIBOVF        0x10
#define CMX_CRCFEC        0x08
#define CMX_DQRDY         0x04
#define CMX_MOBAN         0x02
#define CMX_PKTDET        0x01

/* Bits in Status Register 2 (READ) */
#define CMX_PLL_CHANGE    0x80
#define CMX_MAIN_LOCK     0x40
#define CMX_AUX_LOCK      0x20
#define CMX_TX_LOCK       0x10
#define CMX_SPC_RDY       0x08
#define CMX_AUXADC_RDY    0x04
#define CMX_FREQ_OFFS_ERR 0x02
#define CMX_DC_OFFSET     0x01


/* Bits in HW test access 2 */
#define CMX_HW_SWAP_IO    0x10
#define CMX_HW_TRIM       0x0A /* Default value */

#endif  /* CMX990_REG_H */