📄 energy.h
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#ifndef _ENERGY_H_
#define _ENERGY_H_
/*******************************************************************************
Definition of Union ADE_REGS
*******************************************************************************/
//Data of this type are used for data exchange between ADE module and Core.
//It can be accessed in different methods:by byte,by word and by double word.
//So it provides an easy way to access the ADE registers.
typedef union
{
unsigned long all;
struct
{
unsigned int low;
unsigned char high;
}wordL;
struct
{
unsigned char low;
unsigned int high;
}wordH;
struct
{
unsigned char DataL;
unsigned char DataM;
unsigned char DataH;
}bytes;
}ADE_REGS;
typedef struct
{
unsigned char DD;
unsigned char MM;
unsigned char YY;
unsigned char CF1;
unsigned long AE;
unsigned char CF2;
unsigned long RE;
unsigned char Sum;
}EEDATA;
/*******************************************************************************
Definition of Energy Registers--MODE1
*******************************************************************************/
#define SWRST 0x80 //Reset all of the energy measurement registers to default
#define DISZXLPF 0x40 //Disable the zero-crossing LPF
#define INTE 0x20 //Enable the digital integrator
#define SWAPBITS 0x10 //Swap CH1&CH2 ADCs
#define PWRDN 0x08 //Power down ADCs.
#define DISCF2 0x04 //Disable Frequency output CF2
#define DISCF1 0x02 //Disable Frequency output CF1
#define DISHPF 0x01 //Disable the HPFs in voltage and current channels.
/*******************************************************************************
Definition of Energy Registers--MODE2
*******************************************************************************/
//Configuration bits for CF2 output
#define CF2_WATT 0x00 //CF2 frequency is proportional to active power
#define CF2_VAR 0x40 //CF2 frequency is proportional to reactive power
#define CF2_VA_IRMS 0x80 //CF2 frequency is proportional to apparent power or IRMS
//Configuration bits for CF1 output
#define CF1_WATT 0x00 //CF1 frequency is proportional to active power
#define CF1_VAR 0x10 //CF1 frequency is proportional to reactive power
#define CF1_VA_IRMS 0x20 //CF1 frequency is proportional to apparent power or IRMS
//Configuration bits for apparent power or IRMS for CF1&CF2 outputs
#define CF_IRMS 0x08
#define CF_VA 0x00
#define ZXRMS 0x04 //Enable update of RMS values synchronously to voltage ZX
#define FREQSEL 0x02 //PER_FREQ register holds a frequency measurement
/*******************************************************************************
Definition of Energy Registers--WAVMODE
*******************************************************************************/
//Waveform 2 selection for samples mode
#define WAV2_CURRENT 0x00 //Current output
#define WAV2_VOLTAGE 0x20 //Voltage output
#define WAV2_AP_MUL 0x40 //Active Power multiplier output
#define WAV2_VAR_MUL 0x60 //Reactive Power multiplier output
#define WAV2_VA_MUL 0x80 //VA multiplier output
#define WAV2_IRMS_LPF 0xa0 //IRMS LPF output
//Waveform 1 selection for samples mode
#define WAV1_CURRENT 0x00 //Current output
#define WAV1_VOLTAGE 0x04 //Voltage output
#define WAV1_AP_MUL 0x08 //Active Power multiplier output
#define WAV1_VAR_MUL 0x0c //Reactive Power multiplier output
#define WAV1_VA_MUL 0x10 //VA multiplier output
#define WAV1_IRMS_LPF 0x14 //IRMS LPF output
//Waveform samples output data rate
#define DTRT_25K6 0x00 //25.6Ksps
#define DTRT_12K8 0x01 //12.8Ksps
#define DTRT_6K4 0x02 // 6.4Ksps
#define DTRT_3K2 0x03 // 3.2Ksps
/*******************************************************************************
Definition of Energy Registers--NOLDMODE
*******************************************************************************/
#define IRMSNOLOAD 0x40 //Enable IRMS no-load threshold detection.
//The level is defined by the setting of the VANOLOAD bits.
//Apparent power No-load threshold
#define VANOLOAD_OFF 0x00 //Disabled
#define VANOLOAD_030 0x10 //Enabled with threshold = 0.030% of Full scale
#define VANOLOAD_015 0x20 //Enabled with threshold = 0.015% of Full scale
#define VANOLOAD_0075 0x30 //Enabled with threshold = 0.0075% of Full scale
//Reactive power No-l oad threshold
#define VARNOLOAD_OFF 0x00 //Disabled
#define VARNOLOAD_015 0x04 //Enabled with threshold = 0.015% of Full scale
#define VARNOLOAD_0075 0x08 //Enabled with threshold = 0.0075% of Full scale
#define VARNOLOAD_0037 0x0c //Enabled with threshold = 0.0037% of Full scale
//Reactive power No-l oad threshold
#define APNOLOAD_OFF 0x00 //Disabled
#define APNOLOAD_015 0x01 //Enabled with threshold = 0.015% of Full scale
#define APNOLOAD_0075 0x02 //Enabled with threshold = 0.0075% of Full scale
#define APNOLOAD_0037 0x03 //Enabled with threshold = 0.0037% of Full scale
/*******************************************************************************
Definition of Energy Registers--ACCMODE
*******************************************************************************/
//This bit indicate the current channel used to measure energy in anti-tampering mode
//0-Channel A
//1-Channel B
#define ICHANNEL 0x80
//Configuration bit to select event that will trigger a Fault interrupt
//0-Fault interrupt occurs when part enters Fault mode.
//1-Fault interrupt occurs when part enters Normal mode.
#define FAULTSIGN_EXIT 0x40
#define FAULTSIGN_ENTER 0x00
//Configuration bit to select event that will trigger an reactive power sign interrupt
//0-VARSIGN interrupt occurs when reative power changes from positive to negative
//1-VARSIGN interrupt occurs when reative power changes from negative to positive
#define VARSIGN_N_P 0x20
#define VARSIGN_P_N 0x00
//Configuration bit to select event that will trigger an active power sign interrupt
//0-VARSIGN interrupt occurs when ative power changes from positive to negative
//1-VARSIGN interrupt occurs when ative power changes from negative to positive
#define APSIGN_N_P 0x10
#define APSIGN_P_N 0x00
//1-Enables absolute value accumulation of Reactive power in energy register and pulse output
#define ABSVARM 0x08
//1-Enables reactive power accumulation depending on the sign of active power
//if Active power is positive,VAR is accumulated as it is;
//if Active power is negative,the sign of the VAR is reversed for the accumulation.
//This accumulation mode affects both the VAR registers and the VARCF output.
#define SAVARM 0x04
//1-Enables positive only accumulation of Active power in energy register and pulse output
#define POAM 0x02
//1-Enables absolute value accumulation of Active power in energy register and pulse output
#define ABSAM 0x01
/*******************************************************************************
Definition of Energy Registers--GAIN
*******************************************************************************/
//These bits define the voltage channel input gain
#define PGA2_X1 0x00 //Gain = 1
#define PGA2_X2 0x20 //Gain = 2
#define PGA2_X4 0x40 //Gain = 4
#define PGA2_X8 0x60 //Gain = 8
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