osprocessor.h

osapi 2.0 操作系统抽象层 "系统抽象层"使得你可以实现一种对于RTOS、CPU和所运行产品物理特性完全透明的软件。使用这种公共通用接口

/*
** osprocessor.h
**
*/

#ifndef _osprocessor_
#define _osprocessor_

/*
** Exception vector defines
*/
#define OS_ACCESS_ERROR_EXCEPTION        0x02
#define OS_ADDRESS_ERROR_EXCEPTION       0x03
#define OS_ILLEGAL_INSTRUCTION_EXCEPTION 0x04
#define OS_PRIV_VIOLATION_EXCEPTION      0x08
#define OS_UNIMP_A_LINE_EXCEPTION        0x0A
#define OS_UNIMP_F_LINE_EXCEPTION        0x0B
#define OS_DEBUG_EXCEPTION               0x0C
#define OS_FORMAT_ERROR_EXCEPTION        0x0E
#define OS_UNINIT_INTERRUPT_EXCEPTION    0x0F


/*
** Define the size of the Coldfire CPU context save area
*/
#define OS_CPU_CONTEXT_SIZE              30


/*
** Defines used for exception/interrupt processing.
** The ColdFire family of processors has a simplified exception stack
** frame that looks like the following:
**
**              3322222222221111 111111
**              1098765432109876 5432109876543210
**           8 +----------------+----------------+
**             |         Program Counter         |
**           4 +----------------+----------------+
**             |FS/Fmt/Vector/FS|      SR        |
**   SP -->  0 +----------------+----------------+
**
** The stack self-aligns to a 4-byte boundary at an exception, with
** the FS/Fmt/Vector/FS field indicating the size of the adjustment
** (SP += 0,1,2,3 bytes).
*/

#define MCF_RD_SF_FORMAT(PTR)  ((*((uint16 *)(PTR)) >> 12) & 0x00FF)
#define MCF_RD_SF_VECTOR(PTR)  ((*((uint16 *)(PTR)) >>  2) & 0x00FF)
#define MCF_RD_SF_FS(PTR)      ( ((*((uint16 *)(PTR)) & 0x0C00) >> 8) | (*((uint16 *)(PTR)) & 0x0003) )
#define MCF_SF_SR(PTR)         *((uint16 *)(PTR)+1)
#define MCF_SF_PC(PTR)         *((uint32 *)(PTR)+1)

#define MCF_SF_GET_FORMAT(data)    ((data >> 28) & 0xFF)
#define MCF_SF_GET_VECTOR(data)    ((data >> 18) & 0xFF)
#define MCF_SF_GET_FS(data)        (((data >> 24) | (data >> 19)) & 0x0F)

typedef struct
{
   uint16    SR;
   uint16    FS_FMT_VECTOR_FS;
   uint32    PC;
     
} MCF_EXCEPT_STACK_FRAME;

/*
** Most of this is already defined in rhcf5208.h
** This probably needs to be resolved.
*/
#ifndef __RHCF5208_H__
   /*
   ** MBAR is the base address of the internal registers
   */
   #define MBAR 0x10000000

   /*
   **  macros to access internal registers 
   */
   #ifdef ASM
      #define RHCF5208_REG8(base,ofs) (ofs+base)
      #define RHCF5208_REG16(base,ofs) (ofs+base)
      #define RHCF5208_REG32(base,ofs) (ofs+base)
   #else
      #define RHCF5208_REG8(base,ofs) \
    	   (volatile uint8 *)((uint8 *)(base) + (ofs))
      #define RHCF5208_REG16(base,ofs) \
	       (volatile uint16 *)((uint8 *)(base) + (ofs))
      #define RHCF5208_REG32(base,ofs) \
	       (volatile uint32 *)((uint8 *)(base) + (ofs))
   #endif

   #define RHCF5208_IMR(mbar) RHCF5208_REG32(mbar,0x44)
   #define RHCF5208_INTR_BIT(n) (1 << (n))

   #define RHCF5208_REG16(base,ofs) \
         (volatile uint16 *)((uint8 *)(base) + (ofs))

   /* 
   ** Port A Data Register 
   */
   #define RHCF5208_PPDAT(mbar) RHCF5208_REG16(mbar,0x248)

   #define RHCF5208_PP_DAT0  (0x0001)
   #define RHCF5208_PP_DAT1  (0x0002)
   #define RHCF5208_PP_DAT2  (0x0004)

#endif

#endif