ocm4_16a.sym

sch是原理图 7920的驱动程序 avr128

00000000 W __heap_end
00000000 a __tmp_reg__
00000000 W __vector_default
00000000 T __vectors
00000001 a __zero_reg__
0000003d a __SP_L__
0000003e a __SP_H__
0000003f a __SREG__
0000008c T __ctors_end
0000008c T __ctors_start
0000008c T __dtors_end
0000008c T __dtors_start
0000008c W __init
00000098 T __do_copy_data
000000a8 t .__do_copy_data_loop
000000ac t .__do_copy_data_start
000000b2 T __do_clear_bss
000000ba t .do_clear_bss_loop
000000bc t .do_clear_bss_start
000000c6 T __bad_interrupt
000000c6 W __vector_1
000000c6 W __vector_10
000000c6 W __vector_11
000000c6 W __vector_12
000000c6 W __vector_13
000000c6 W __vector_14
000000c6 W __vector_15
000000c6 W __vector_16
000000c6 W __vector_17
000000c6 W __vector_18
000000c6 W __vector_19
000000c6 W __vector_2
000000c6 W __vector_20
000000c6 W __vector_21
000000c6 W __vector_22
000000c6 W __vector_23
000000c6 W __vector_24
000000c6 W __vector_25
000000c6 W __vector_26
000000c6 W __vector_27
000000c6 W __vector_28
000000c6 W __vector_29
000000c6 W __vector_3
000000c6 W __vector_30
000000c6 W __vector_31
000000c6 W __vector_32
000000c6 W __vector_33
000000c6 W __vector_34
000000c6 W __vector_4
000000c6 W __vector_5
000000c6 W __vector_6
000000c6 W __vector_7
000000c6 W __vector_8
000000c6 W __vector_9
000000ca T delay_1us
000000ce T delay_nus
000000e6 T delay_1ms
000000f2 T delay_nms
0000010a T chk_busy
0000013e T send_d
00000186 T send_c
000001ce T clrram
000001e4 T lat_disp
000002ba T img_disp1
000003f0 T img_disp
00000514 T chn_disp2
000005ca T chn_disp1
00000612 T chn_disp
000006b8 T init_lcd
00000708 T main
000007c4 A __data_load_start
000007c4 T _etext
000007c4 t Letext
00001066 A __data_load_end
000010ff W __stack
00800100 D __data_start
00800100 D tab4
00800500 D tab3
00800900 D tab2
00800940 D tab1
008009a2 B __bss_end
008009a2 B __bss_start
008009a2 D __data_end
008009a2 D _edata
008009a2 ? _end
00810000 ? __eeprom_end