dianti.fit.qmsg

用VHDL 语言描述度八层电梯

{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "5.349 ns register register " "Info: Estimated most critical path is register to register delay of 5.349 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns c_u22 1 REG LAB_X11_Y5 5 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X11_Y5; Fanout = 5; REG Node = 'c_u22'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "dianti" "UNKNOWN" "V1" "F:/临时/EDA/电梯/db/dianti.quartus_db" { Floorplan "F:/临时/EDA/电梯/" "" "" { c_u22 } "NODE_NAME" } "" } } { "dianti.vhd" "" { Text "F:/临时/EDA/电梯/dianti.vhd" 23 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.670 ns) + CELL(0.114 ns) 1.784 ns en_dw~1644 2 COMB LAB_X9_Y6 1 " "Info: 2: + IC(1.670 ns) + CELL(0.114 ns) = 1.784 ns; Loc. = LAB_X9_Y6; Fanout = 1; COMB Node = 'en_dw~1644'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "dianti" "UNKNOWN" "V1" "F:/临时/EDA/电梯/db/dianti.quartus_db" { Floorplan "F:/临时/EDA/电梯/" "" "1.784 ns" { c_u22 en_dw~1644 } "NODE_NAME" } "" } } { "dianti.vhd" "" { Text "F:/临时/EDA/电梯/dianti.vhd" 31 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.934 ns) + CELL(0.442 ns) 3.160 ns en_dw~1645 3 COMB LAB_X10_Y5 1 " "Info: 3: + IC(0.934 ns) + CELL(0.442 ns) = 3.160 ns; Loc. = LAB_X10_Y5; Fanout = 1; COMB Node = 'en_dw~1645'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "dianti" "UNKNOWN" "V1" "F:/临时/EDA/电梯/db/dianti.quartus_db" { Floorplan "F:/临时/EDA/电梯/" "" "1.376 ns" { en_dw~1644 en_dw~1645 } "NODE_NAME" } "" } } { "dianti.vhd" "" { Text "F:/临时/EDA/电梯/dianti.vhd" 31 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.223 ns) + CELL(0.442 ns) 3.825 ns en_dw~1647 4 COMB LAB_X10_Y5 1 " "Info: 4: + IC(0.223 ns) + CELL(0.442 ns) = 3.825 ns; Loc. = LAB_X10_Y5; Fanout = 1; COMB Node = 'en_dw~1647'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "dianti" "UNKNOWN" "V1" "F:/临时/EDA/电梯/db/dianti.quartus_db" { Floorplan "F:/临时/EDA/电梯/" "" "0.665 ns" { en_dw~1645 en_dw~1647 } "NODE_NAME" } "" } } { "dianti.vhd" "" { Text "F:/临时/EDA/电梯/dianti.vhd" 31 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.786 ns) + CELL(0.738 ns) 5.349 ns en_dw 5 REG LAB_X10_Y6 5 " "Info: 5: + IC(0.786 ns) + CELL(0.738 ns) = 5.349 ns; Loc. = LAB_X10_Y6; Fanout = 5; REG Node = 'en_dw'" {  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "dianti" "UNKNOWN" "V1" "F:/临时/EDA/电梯/db/dianti.quartus_db" { Floorplan "F:/临时/EDA/电梯/" "" "1.524 ns" { en_dw~1647 en_dw } "NODE_NAME" } "" } } { "dianti.vhd" "" { Text "F:/临时/EDA/电梯/dianti.vhd" 31 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.736 ns ( 32.45 % ) " "Info: Total cell delay = 1.736 ns ( 32.45 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.613 ns ( 67.55 % ) " "Info: Total interconnect delay = 3.613 ns ( 67.55 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "dianti" "UNKNOWN" "V1" "F:/临时/EDA/电梯/db/dianti.quartus_db" { Floorplan "F:/临时/EDA/电梯/" "" "5.349 ns" { c_u22 en_dw~1644 en_dw~1645 en_dw~1647 en_dw } "NODE_NAME" } "" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "2 4 " "Info: Average interconnect usage is 2% of the available device resources. Peak interconnect usage is 4%" {  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:00 " "Info: Fitter routing operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}