📄 decl7s.map.eqn
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--A1L21 is Mux~67
--operation mode is normal
A1L21 = A[1] & (!A[2] & A[3]) # !A[1] & (A[0] & (A[2] $ !A[3]) # !A[0] & A[2] & !A[3]);
--A1L22 is Mux~68
--operation mode is normal
A1L22 = A[1] & A[3] & !A[0] & !A[2];
--A1L23 is Mux~69
--operation mode is normal
A1L23 = A[1] & (A[3] # !A[0] & A[2]) # !A[1] & A[2] & (A[0] $ A[3]);
--A1L24 is Mux~70
--operation mode is normal
A1L24 = A[2] & A[3] & (A[1] # !A[0]) # !A[2] & !A[0] & A[1];
--A1L25 is Mux~71
--operation mode is normal
A1L25 = A[1] & (A[0] & A[2] # !A[0] & !A[2] & A[3]) # !A[1] & !A[3] & (A[0] $ A[2]);
--A1L26 is Mux~72
--operation mode is normal
A1L26 = A[2] & !A[3] & (A[0] # !A[1]) # !A[2] & (A[0] $ (A[1] & A[3]));
--A1L27 is Mux~73
--operation mode is normal
A1L27 = A[0] & (A[3] $ (A[1] # !A[2])) # !A[0] & A[1] & !A[2];
--A1L28 is Mux~74
--operation mode is normal
A1L28 = A[3] & (A[0] # A[1] $ !A[2]) # !A[3] & (A[1] & (!A[2] # !A[0]) # !A[1] & (A[2]));
--LED7S[0]$latch is LED7S[0]$latch
--operation mode is normal
LED7S[0]$latch = A1L22 & (LED7S[0]$latch) # !A1L22 & !A1L21;
--LED7S[1]$latch is LED7S[1]$latch
--operation mode is normal
LED7S[1]$latch = A1L22 & (LED7S[1]$latch) # !A1L22 & !A1L23;
--LED7S[2]$latch is LED7S[2]$latch
--operation mode is normal
LED7S[2]$latch = A1L22 & (LED7S[2]$latch) # !A1L22 & !A1L24;
--LED7S[3]$latch is LED7S[3]$latch
--operation mode is normal
LED7S[3]$latch = A1L22 & (LED7S[3]$latch) # !A1L22 & !A1L25;
--LED7S[4]$latch is LED7S[4]$latch
--operation mode is normal
LED7S[4]$latch = A1L22 & (LED7S[4]$latch) # !A1L22 & !A1L26;
--LED7S[5]$latch is LED7S[5]$latch
--operation mode is normal
LED7S[5]$latch = A1L22 & (LED7S[5]$latch) # !A1L22 & !A1L27;
--LED7S[6]$latch is LED7S[6]$latch
--operation mode is normal
LED7S[6]$latch = A1L22 & (LED7S[6]$latch) # !A1L22 & A1L28;
--A[0] is A[0]
--operation mode is input
A[0] = INPUT();
--A[1] is A[1]
--operation mode is input
A[1] = INPUT();
--A[2] is A[2]
--operation mode is input
A[2] = INPUT();
--A[3] is A[3]
--operation mode is input
A[3] = INPUT();
--LED7S[0] is LED7S[0]
--operation mode is output
LED7S[0] = OUTPUT(LED7S[0]$latch);
--LED7S[1] is LED7S[1]
--operation mode is output
LED7S[1] = OUTPUT(LED7S[1]$latch);
--LED7S[2] is LED7S[2]
--operation mode is output
LED7S[2] = OUTPUT(LED7S[2]$latch);
--LED7S[3] is LED7S[3]
--operation mode is output
LED7S[3] = OUTPUT(LED7S[3]$latch);
--LED7S[4] is LED7S[4]
--operation mode is output
LED7S[4] = OUTPUT(LED7S[4]$latch);
--LED7S[5] is LED7S[5]
--operation mode is output
LED7S[5] = OUTPUT(LED7S[5]$latch);
--LED7S[6] is LED7S[6]
--operation mode is output
LED7S[6] = OUTPUT(LED7S[6]$latch);
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