📄 target.h
字号:
/*****************************************************************************
* target.h: Header file for NXP LPC230x Family Microprocessors
*
* Copyright(C) 2006, NXP Semiconductor
* All rights reserved.
*
* History
* 2006.09.20 ver 1.00 Prelimnary version, first Release
* 2007.02.12 LPC214x, JW
*
******************************************************************************/
#ifndef __TARGET_H
#define __TARGET_H
#ifdef __cplusplus
extern "C" {
#endif
/* If USB device is used, the CCLK setting needs to be 57.6Mhz, CCO will be 288Mhz
to get precise USB clock 48Mhz. If USB is not used, you set any clock you want
based on the table below. If you want to use USB, change "define USE_USB" from 0 to 1 */
#define USE_USB 1
//This segment should not be modified
#ifndef TRUE
#define TRUE 1
#endif
#ifndef FALSE
#define FALSE 0
#endif
/* interrupt priority table */
#define INDEX_SSP0_INT 0
#define INDEX_TIMER0_INT 1
#define INDEX_UART0_INT 2
#define INDEX_UART1_INT 3
/* System configuration: Fosc, Fcclk, Fcco, Fpclk must be defined */
/* PLL input Crystal frequence range 4KHz~20MHz. */
#define Fosc 12000000
/* System frequency, should be less than 80MHz. */
#define Fcclk 60000000
/* Fpclk = 4Mhz, Fosc = 12MHz, Fcclk = 60Mhz */
#define PLL0_MSEL 5
#define PLL0_PSEL 2
/* Fpclk = 4Mhz, Fosc = 12MHz, Fcclk = 48Mhz */
#define PLL1_MSEL 4
#define PLL1_PSEL 1
/* If USB is enabled, the minimum APB must be greater than 16Mhz */
#if USE_USB
#define Fpclk (Fcclk / 2)
#else
#define Fpclk (Fcclk / 4)
#endif
#ifdef __cplusplus
}
#endif
#endif /* end __TARGET_H */
/******************************************************************************
** End Of File
******************************************************************************/
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -