bp1_decoder.v

来自「H.264的CABAC的旁路码的decoding.」· Verilog 代码 · 共 62 行

module BP1_decoder(range_out, offset_out, bin_2, range_from_RB1, 
	               offset_from_RB1, range_from_outModule, offset_from_outModule, dec_mode, 
	               RB1_used_bins, readReg, bin_0, syntaxElement);
	output [8:0] 	range_out;			   
	output [8:0]	offset_out;
	output 			bin_2;
	//output [3:0]	total_used_bins;
	
	reg [8:0]		range_out;
	reg [8:0]		offset_out;
	reg 			bin_2;
	//reg [3:0]		total_used_bins;  //because connect to BP2 is prefix part, but to get bins is in another cycle
	
	input [8:0]		range_from_RB1;
	input [8:0]		offset_from_RB1;
	input [8:0]		range_from_outModule;
	input [8:0]		offset_from_outModule;
	input [2:0]		dec_mode;
	input [3:0]		RB1_used_bins;
	input [15:0]	readReg; 
	input 			bin_0;				//RB1 decoder out of bin
	input [4:0]		syntaxElement;
	//input 			IsFirstPrefix;
	
	reg [8:0]		range_new;
	reg [8:0]		offset_new;	  
	
	always @(range_from_RB1 or offset_from_RB1 or range_from_outModule or offset_from_outModule 
		    or dec_mode or RB1_used_bins or readReg or bin_0 or syntaxElement)
	begin		
		if(((syntaxElement == 4) || (syntaxElement == 18)) && (((dec_mode == 0 || dec_mode == 4) && (bin_0 == 0)) || (dec_mode == 1) || (dec_mode == 2) || (dec_mode == 3)))
			begin
				if((dec_mode == 0) && (bin_0 == 0))		//decoding sign by RB1
					begin 
						range_new = range_from_RB1;
						offset_new = offset_from_RB1;
						offset_new = offset_new << 1;
						offset_new[0] = readReg[RB1_used_bins];
					end	
				else									 //range and offset are provided by out module
					begin
						range_new = range_from_outModule;
						offset_new = offset_from_outModule;	 
						offset_new = offset_new << 1;
						offset_new[0] = readReg[0];		//because it is in another cycle
					end
				 
				if(offset_new < range_new)
					begin
						bin_2 = 0;
					end			  
				else
					begin
						bin_2 = 1;
						offset_new = offset_new - range_new;
					end	
				range_out = range_new;
				offset_out = offset_new;
			end
	end	
			
endmodule