setapll.asm

5509A usb模块由默认的DPLL转向AP

;**************************************************************************
;
;       File Name   : setapll.asm
;       Project     : f_usb
;       Author      : LP
;       
;       Version     : 0.1
;       Date        : 17 April 07
;       Update      : 
;
;       Description : This Program Switches The 5509A System Clock From 
;                     The Default Bypass/DPLL To APLL. It Was Tested Using a 12MHz
;                     Input Clock Crystal.
;
;**************************************************************************
	.text			; Create Code Section (Default is .text)
	
;Register Definitions	
USB_APLL_CLKMD     		.set	0x1F00	;USB APLL CLKMode Register
USB_PLL_SEL				.set 	0x1E80	;USB PLL Selection Register
		
	.def _setapll		; Define Label To Start of The Code	
_setapll:	
	;Processor mode initialization
	BCLR	C54CM	; Set Processor To '55x Native Mode Instead 
					; of '54x Compatibility Mode (Reset Value)
	 
	BCLR CLKOFF		; Enable The CLKOUT Pin
		
;First Turn On and Configure The APLL	
	;1.) Turn ON VCO APLL
	MOV 0x0004, Port(#USB_APLL_CLKMD)
	
	;2.) Wait For VCO ON To Latch Internally	
	RPT #25
	NOP
		
	;3.) Turn OFF VCO APLL
	MOV 0x0000, PORT(#USB_APLL_CLKMD)
		
	;4.) PLDIV = 0
	AND 0xF7FF, Port(#USB_APLL_CLKMD)
		
	;5.) PLLNDIV = 0
	AND 0xFFFD, Port(#USB_APLL_CLKMD)		
		
	;6.) Set PLMUL To x 4
	OR 0x3000, Port(#USB_APLL_CLKMD)
									
	;7.) Wait For PLDIV, PLLNDIV, PLMUL To Latch Internally
	RPT #25
	NOP

	;Leave This Commented Out Unless You Want To Divide 
	;By 2 or 4 Depending on K

	;8.) Set PLDIV = 1
	;OR 0x0800, Port(#USB_APLL_CLKMD)
					
	;9.) Set PLLNDIV = 1		
	OR 0x0002, Port(#USB_APLL_CLKMD)

	;10.) Wait For The PLL To Lock. Lock Time is 30 us. With
	;12 MHz Input Clock, Cycle Count is 360.
	RPT #360
	NOP	

;Once Configured, Tell The 5509A To Switch From DPLL or Bypass To APLL
			
	;11.) Switch To APLL From Default DPLL On The 5509A PLL Selection Register
	MOV 0x0001, Port(#USB_PLL_SEL)
	
;The USB is Now Switched To The APLL
    RPT #300
    NOP