srctrl.in.h

free hardware ip core about sparcv8,a soc cpu in vhdl

#ifndef CONFIG_SRCTRL
#define CONFIG_SRCTRL 0
#endif

#ifndef CONFIG_SRCTRL_PROMWS
#define CONFIG_SRCTRL_PROMWS 0
#endif

#ifndef CONFIG_SRCTRL_RAMWS
#define CONFIG_SRCTRL_RAMWS 0
#endif

#ifndef CONFIG_SRCTRL_IOWS
#define CONFIG_SRCTRL_IOWS 0
#endif

#ifndef CONFIG_SRCTRL_RMW
#define CONFIG_SRCTRL_RMW 0
#endif

#ifndef CONFIG_SRCTRL_8BIT
#define CONFIG_SRCTRL_8BIT 0
#endif


#ifndef CONFIG_SRCTRL_ROMASEL
#define CONFIG_SRCTRL_ROMASEL 0
#endif

#if defined CONFIG_SRCTRL_SRBANKS1
#define CFG_SR_CTRL_SRBANKS 1
#elif defined CONFIG_SRCTRL_SRBANKS2
#define CFG_SR_CTRL_SRBANKS 2
#elif defined CONFIG_SRCTRL_SRBANKS3
#define CFG_SR_CTRL_SRBANKS 3
#elif defined CONFIG_SRCTRL_SRBANKS4
#define CFG_SR_CTRL_SRBANKS 4
#elif defined CONFIG_SRCTRL_SRBANKS5
#define CFG_SR_CTRL_SRBANKS 5
#else
#define CFG_SR_CTRL_SRBANKS 1
#endif

#if defined CONFIG_SRCTRL_BANKSZ0
#define CFG_SR_CTRL_BANKSZ 0
#elif defined CONFIG_SRCTRL_BANKSZ1
#define CFG_SR_CTRL_BANKSZ 1
#elif defined CONFIG_SRCTRL_BANKSZ2
#define CFG_SR_CTRL_BANKSZ 2
#elif defined CONFIG_SRCTRL_BANKSZ3
#define CFG_SR_CTRL_BANKSZ 3
#elif defined CONFIG_SRCTRL_BANKSZ4
#define CFG_SR_CTRL_BANKSZ 4
#elif defined CONFIG_SRCTRL_BANKSZ5
#define CFG_SR_CTRL_BANKSZ 5
#elif defined CONFIG_SRCTRL_BANKSZ6
#define CFG_SR_CTRL_BANKSZ 6
#elif defined CONFIG_SRCTRL_BANKSZ7
#define CFG_SR_CTRL_BANKSZ 7
#elif defined CONFIG_SRCTRL_BANKSZ8
#define CFG_SR_CTRL_BANKSZ 8
#elif defined CONFIG_SRCTRL_BANKSZ9
#define CFG_SR_CTRL_BANKSZ 9
#elif defined CONFIG_SRCTRL_BANKSZ10
#define CFG_SR_CTRL_BANKSZ 10
#elif defined CONFIG_SRCTRL_BANKSZ11
#define CFG_SR_CTRL_BANKSZ 11
#elif defined CONFIG_SRCTRL_BANKSZ12
#define CFG_SR_CTRL_BANKSZ 12
#elif defined CONFIG_SRCTRL_BANKSZ13
#define CFG_SR_CTRL_BANKSZ 13
#else
#define CFG_SR_CTRL_BANKSZ 0
#endif