ddrsp.in

free hardware ip core about sparcv8,a soc cpu in vhdl

  mainmenu_option next_comment
  comment 'DDR266 SDRAM controller             '
    bool 'Enable DDR266 SDRAM controller       ' CONFIG_DDRSP
    if [ "$CONFIG_DDRSP" = "y" ]; then
      bool 'Enable power-on initialization       ' CONFIG_DDRSP_INIT
      if [ "$CONFIG_DDRSP_INIT" = "y" ]; then
        int 'Memory frequency (MHz)  ' CONFIG_DDRSP_FREQ 100
        int 'Column address bits (9 - 12)  ' CONFIG_DDRSP_COL 9
        int 'Chip select bank size (Mbyte) ' CONFIG_DDRSP_MBYTE 16
      fi
     if [ "$CONFIG_SYN_VIRTEX2" = "y" -o "$CONFIG_SYN_VIRTEX4" = "y" \
	-o "$CONFIG_SYN_SPARTAN3" = "y" -o "$CONFIG_SYN_VIRTEX4" = "y" \
	-o "$CONFIG_SYN_SPARTAN3E" = "y" ]; then
        int 'Read clock phase shift        ' CONFIG_DDRSP_RSKEW 0
      fi
    fi
  endmenu