can_oc.in.help
来自「free hardware ip core about sparcv8,a so」· HELP 代码 · 共 36 行
HELP
36 行
CAN interface enableCONFIG_CAN_ENABLE Say Y here to enable the CAN interace from OpenCores. The core has one AHB slave interface for accessing the control registers. The CAN core ir register-compatible with the SAJ1000 core from Philips.CAN register addressCONFIG_CANIO The control registers of the CAN core occupy 4 kbyte, and are mapped in the AHB bus I/O area (0xFFF00000 - 0xFFFFF000). This setting defines at which address in the I/O area the registers appear (HADDR[19:8]).CAN interruptCONFIG_CANIRQ Defines which interrupt number the CAN core will generate.CAN loob-back testingCONFIG_CANLOOP If you say Y here, the receiver and trasmitter of the CAN core will be connected together in a loop-back fashion. This will make it possible to perform loop-back test, but not data will be sent or received from the outside. ONLY for testing!CAN Synchronous resetCONFIG_CAN_SYNCRST If you say Y here, the CAN core will be implemented with synchronous reset rather than asynchronous. This is needed when the target library does not implement registers with async reset. Unless you know what you are doing, say N.CAN FT memoriesCONFIG_CAN_FT If you say Y here, the CAN FIFOs will be implemented using SEU protected RAM blocks. Only applicable to the FT version of grlib.
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