📄 rtl8029hw.h
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#ifndef _RTL8029HW_
#define _RTL8029HW_
// Types of RTL8029 cards.
//
#define PCIBUS 5
//
// ID for MCA RTL8029 clone cards
//
#define AE2_ADAPTER_ID 0x67b0
#define UB_ADAPTER_ID 0x611f
#define NE2_ADAPTER_ID 0x7154
//
// Microchannel IRQ POS register mask and shift count
//
#define MC_IRQ_MASK 0x60
#define MC_IRQ_MASK_UB 0x0E
//
// Microchannel I/O base address mask and shift count
//
#define MC_IO_BASE_MASK 0x0E
#define MC_IO_BASE_MASK_UB 0xE0
//
#define CIS_NET_ADDR_OFFSET 0xff0
//
// Default value for Adapter->MulticastListMax
//
#define DEFAULT_MULTICASTLISTMAX 8
//
// Offsets from Adapter->IoAddr of the ports used to access
// the 8029 NIC registers.
//
// The names in parenthesis are the abbreviations by which
// the registers are referred to in the 8029 data sheet.
//
// Some of the offsets appear more than once
// because they have have relevant page 0 and page 1 values,
// or they are different registers when read than they are
// when written. The notation MSB indicates that only the
// MSB can be set for this register, the LSB is assumed 0.
//
#define NIC_COMMAND 0x0 // (CR)
#define NIC_PAGE_START 0x1 // (PSTART) MSB, write-only
#define NIC_PHYS_ADDR 0x1 // (PAR0) page 1
#define NIC_PAGE_STOP 0x2 // (PSTOP) MSB, write-only
#define NIC_BOUNDARY 0x3 // (BNRY) MSB
#define NIC_XMIT_START 0x4 // (TPSR) MSB, write-only
#define NIC_XMIT_STATUS 0x4 // (TSR) read-only
#define NIC_XMIT_COUNT_LSB 0x5 // (TBCR0) write-only
#define NIC_XMIT_COUNT_MSB 0x6 // (TBCR1) write-only
#define NIC_FIFO 0x6 // (FIFO) read-only
#define NIC_INTR_STATUS 0x7 // (ISR)
#define NIC_CURRENT 0x7 // (CURR) page 1
#define NIC_MC_ADDR 0x8 // (MAR0) page 1
#define NIC_CRDA_LSB 0x8 // (CRDA0)
#define NIC_RMT_ADDR_LSB 0x8 // (RSAR0)
#define NIC_CRDA_MSB 0x9 // (CRDA1)
#define NIC_RMT_ADDR_MSB 0x9 // (RSAR1)
#define NIC_RMT_COUNT_LSB 0xa // (RBCR0) write-only
#define NIC_RMT_COUNT_MSB 0xb // (RBCR1) write-only
#define NIC_RCV_CONFIG 0xc // (RCR) write-only
#define NIC_RCV_STATUS 0xc // (RSR) read-only
#define NIC_XMIT_CONFIG 0xd // (TCR) write-only
#define NIC_FAE_ERR_CNTR 0xd // (CNTR0) read-only
#define NIC_DATA_CONFIG 0xe // (DCR) write-only
#define NIC_CRC_ERR_CNTR 0xe // (CNTR1) read-only
#define NIC_INTR_MASK 0xf // (IMR) write-only
#define NIC_MISSED_CNTR 0xf // (CNTR2) read-only
#define NIC_RACK_NIC 0x10 // Byte to read or write
#define NIC_RESET 0x1f // (RESET)
//
// Constants for the NIC_COMMAND register.
//
// Start/stop the card, start transmissions, and select
// which page of registers was seen through the ports.
//
#define CR_STOP (UCHAR)0x01 // reset the card
#define CR_START (UCHAR)0x02 // start the card
#define CR_XMIT (UCHAR)0x04 // begin transmission
#define CR_NO_DMA (UCHAR)0x20 // stop remote DMA
#define CR_PS0 (UCHAR)0x40 // low bit of page number
#define CR_PS1 (UCHAR)0x80 // high bit of page number
#define CR_PAGE0 (UCHAR)0x00 // select page 0
#define CR_PAGE1 CR_PS0 // select page 1
#define CR_PAGE2 CR_PS1 // select page 2
#define CR_DMA_WRITE (UCHAR)0x10 // Write
#define CR_DMA_READ (UCHAR)0x08 // Read
#define CR_SEND (UCHAR)0x18 // send
//
// Constants for the NIC_XMIT_STATUS register.
//
// Indicate the result of a packet transmission.
//
#define TSR_XMIT_OK (UCHAR)0x01 // transmit with no errors
#define TSR_COLLISION (UCHAR)0x04 // collided at least once
#define TSR_ABORTED (UCHAR)0x08 // too many collisions
#define TSR_NO_CARRIER (UCHAR)0x10 // carrier lost
#define TSR_NO_CDH (UCHAR)0x40 // no collision detect heartbeat
//
// Constants for the NIC_INTR_STATUS register.
//
// Indicate the cause of an interrupt.
//
#define ISR_EMPTY (UCHAR)0x00 // no bits set in ISR
#define ISR_RCV (UCHAR)0x01 // packet received with no errors
#define ISR_XMIT (UCHAR)0x02 // packet transmitted with no errors
#define ISR_RCV_ERR (UCHAR)0x04 // error on packet reception
#define ISR_XMIT_ERR (UCHAR)0x08 // error on packet transmission
#define ISR_OVERFLOW (UCHAR)0x10 // receive buffer overflow
#define ISR_COUNTER (UCHAR)0x20 // MSB set on tally counter
#define ISR_DMA_DONE (UCHAR)0x40 // RDC
#define ISR_RESET (UCHAR)0x80 // (not an interrupt) card is reset
//
// Constants for the NIC_RCV_CONFIG register.
//
// Configure what type of packets are received.
//
#define RCR_REJECT_ERR (UCHAR)0x00 // reject error packets
#define RCR_BROADCAST (UCHAR)0x04 // receive broadcast packets
#define RCR_MULTICAST (UCHAR)0x08 // receive multicast packets
#define RCR_ALL_PHYS (UCHAR)0x10 // receive ALL directed packets
#define RCR_MONITOR (UCHAR)0x20 // don't collect packets
//
// Constants for the NIC_RCV_STATUS register.
//
// Indicate the status of a received packet.
//
// These are also used to interpret the status byte in the
// packet header of a received packet.
//
#define RSR_PACKET_OK (UCHAR)0x01 // packet received with no errors
#define RSR_CRC_ERROR (UCHAR)0x02 // packet received with CRC error
#define RSR_MULTICAST (UCHAR)0x20 // packet received was multicast
#define RSR_DISABLED (UCHAR)0x40 // received is disabled
#define RSR_DEFERRING (UCHAR)0x80 // receiver is deferring
//
// Constants for the NIC_XMIT_CONFIG register.
//
// Configures how packets are transmitted.
//
#define TCR_NO_LOOPBACK (UCHAR)0x00 // normal operation
#define TCR_LOOPBACK (UCHAR)0x02 // loopback (set when NIC is stopped)
#define TCR_INHIBIT_CRC (UCHAR)0x01 // inhibit appending of CRC
#define TCR_NIC_LBK (UCHAR)0x02 // loopback through the NIC
#define TCR_SNI_LBK (UCHAR)0x04 // loopback through the SNI
#define TCR_COAX_LBK (UCHAR)0x06 // loopback to the coax
//
// Constants for the NIC_DATA_CONFIG register.
//
// Set data transfer sizes.
//
#define DCR_BYTE_WIDE (UCHAR)0x00 // byte-wide DMA transfers
#define DCR_WORD_WIDE (UCHAR)0x01 // word-wide DMA transfers
#define DCR_LOOPBACK (UCHAR)0x00 // loopback mode (TCR must be set)
#define DCR_NORMAL (UCHAR)0x08 // normal operation
#define DCR_FIFO_2_BYTE (UCHAR)0x00 // 2-byte FIFO threshhold
#define DCR_FIFO_4_BYTE (UCHAR)0x20 // 4-byte FIFO threshhold
#define DCR_FIFO_8_BYTE (UCHAR)0x40 // 8-byte FIFO threshhold
#define DCR_FIFO_12_BYTE (UCHAR)0x60 // 12-byte FIFO threshhold
#define DCR_AUTO_INIT (UCHAR)0x10 // Auto-init to remove packets from ring
//
// Constants for the NIC_INTR_MASK register.
//
// Configure which ISR settings actually cause interrupts.
//
#define IMR_RCV (UCHAR)0x01 // packet received with no errors
#define IMR_XMIT (UCHAR)0x02 // packet transmitted with no errors
#define IMR_RCV_ERR (UCHAR)0x04 // error on packet reception
#define IMR_XMIT_ERR (UCHAR)0x08 // error on packet transmission
#define IMR_OVERFLOW (UCHAR)0x10 // receive buffer overflow
#define IMR_COUNTER (UCHAR)0x20 // MSB set on tally counter
#define BIT_0 0x0001
#define BIT_1 0x0002
#define BIT_2 0x0004
#define BIT_3 0x0008
#define BIT_4 0x0010
#define BIT_5 0x0020
#define BIT_6 0x0040
#define BIT_7 0x0080
#define BIT_8 0x0100
#define BIT_9 0x0200
#define BIT_10 0x0400
#define BIT_11 0x0800
#define BIT_12 0x1000
#define BIT_13 0x2000
#define BIT_14 0x4000
#define BIT_15 0x8000
#define BIT_24 0x01000000
#define BIT_28 0x10000000
#define BIT_0_2 0x0007
#define BIT_0_3 0x000F
#define BIT_0_4 0x001F
#define BIT_0_5 0x003F
#define BIT_0_6 0x007F
#define BIT_0_7 0x00FF
#define BIT_0_8 0x01FF
#define BIT_0_13 0x3FFF
#define BIT_0_15 0xFFFF
#define BIT_1_2 0x0006
#define BIT_1_3 0x000E
#define BIT_2_5 0x003C
#define BIT_3_4 0x0018
#define BIT_4_5 0x0030
#define BIT_4_6 0x0070
#define BIT_4_7 0x00F0
#define BIT_5_7 0x00E0
#define BIT_5_9 0x03E0
#define BIT_5_12 0x1FE0
#define BIT_5_15 0xFFE0
#define BIT_6_7 0x00c0
#define BIT_7_11 0x0F80
#define BIT_8_10 0x0700
#define BIT_9_13 0x3E00
#define BIT_12_15 0xF000
#define BIT_16_20 0x001F0000
#define BIT_21_25 0x03E00000
#define BIT_26_27 0x0C000000
#define CMD_IO_SPACE BIT_0
#define CMD_MEMORY_SPACE BIT_1
#define CMD_BUS_MASTER BIT_2
#define CMD_SPECIAL_CYCLES BIT_3
#define CMD_MEM_WRT_INVALIDATE BIT_4
#define CMD_VGA_PALLETTE_SNOOP BIT_5
#define CMD_PARITY_RESPONSE BIT_6
#define CMD_WAIT_CYCLE_CONTROL BIT_7
#define CMD_SERR_ENABLE BIT_8
#define CMD_BACK_TO_BACK BIT_9
//define PCI register
#define PCI_VENDOR_ID_REGISTER 0x00
#define PCI_REV_ID_REGISTER 0x08
#define PCI_SUBVENDOR_ID_REGISTER 0x2c
#define PCI_COMMAND_REGISTER 0x04
//++
//
// VOID
// CardStart(
// IN PRTL8029_ADAPTER Adapter
// )
//
//
// Routine Description:
//
// Starts the card.
//
// Arguments:
//
// Adapter - pointer to the adapter block
//
// Return Value:
//
// None.
//
//--
//
// Assume that the card has been stopped as in CardStop.
//
#define CardStart(Adapter) \
NdisRawWritePortUchar(((Adapter->IoAddr)+NIC_XMIT_CONFIG), TCR_NO_LOOPBACK)
//++
//
// VOID
// CardSetAllMulticast(
// IN PRTL8029_ADAPTER Adapter
// )
//
// Routine Description:
//
// Enables every bit in the card multicast bit mask.
// Calls SyncCardSetAllMulticast.
//
// Arguments:
//
// Adapter - The adapter block.
//
// Return Value:
//
// None.
//
//--
#define CardSetAllMulticast(Adapter) \
NdisMSynchronizeWithInterrupt(&(Adapter)->Interrupt, \
SyncCardSetAllMulticast, (PVOID)(Adapter))
//++
//
// VOID
// CardCopyMulticastRegs(
// IN PRTL8029_ADAPTER Adapter
// )
//
// Routine Description:
//
// Writes out the entire multicast bit mask to the card from
// Adapter->NicMulticastRegs. Calls SyncCardCopyMulticastRegs.
//
// Arguments:
//
// Adapter - The adapter block.
//
// Return Value:
//
// None.
//
//--
#define CardCopyMulticastRegs(Adapter) \
NdisMSynchronizeWithInterrupt(&(Adapter)->Interrupt, \
SyncCardCopyMulticastRegs, (PVOID)(Adapter))
//++
//
// VOID
// CardGetInterruptStatus(
// IN PRTL8029_ADAPTER Adapter,
// OUT PUCHAR InterrupStatus
// )
//
// Routine Description:
//
// Reads the interrupt status (ISR) register from the card. Only
// called at IRQL INTERRUPT_LEVEL.
//
// Arguments:
//
// Adapter - The adapter block.
//
// InterruptStatus - Returns the value of ISR.
//
// Return Value:
//
//--
#define CardGetInterruptStatus(_Adapter,_InterruptStatus) \
NdisRawReadPortUchar(((_Adapter)->IoAddr+NIC_INTR_STATUS), (_InterruptStatus))
//++
//
// VOID
// CardSetReceiveConfig(
// IN PRTL8029_ADAPTER Adapter
// )
//
// Routine Description:
//
// Sets the receive configuration (RCR) register on the card.
// The value used is Adapter->NicReceiveConfig. Calls
// SyncCardSetReceiveConfig.
//
// Arguments:
//
// Adapter - The adapter block.
//
// Return Value:
//
// None.
//
//--
#define CardSetReceiveConfig(Adapter) \
NdisMSynchronizeWithInterrupt(&(Adapter)->Interrupt, \
SyncCardSetReceiveConfig, (PVOID)(Adapter))
//++
//
// VOID
// CardBlockInterrupts(
// IN PRTL8029_ADAPTER Adapter
// )
//
// Routine Description:
//
// Blocks all interrupts from the card by clearing the
// interrupt mask (IMR) register. Only called from
// IRQL INTERRUPT_LEVEL.
//
// Arguments:
//
// Adapter - The adapter block.
//
// Return Value:
//
// None.
//
//--
#define CardBlockInterrupts(Adapter) \
NdisRawWritePortUchar(((Adapter)->IoAddr+NIC_INTR_MASK), 0)
//++
//
// VOID
// CardUnblockInterrupts(
// IN PRTL8029_ADAPTER Adapter
// )
//
// Routine Description:
//
// Unblocks all interrupts from the card by setting the
// interrupt mask (IMR) register. Only called from IRQL
// INTERRUPT_LEVEL.
//
// Arguments:
//
// Adapter - The adapter block.
//
// Return Value:
//
// None.
//
//--
#define CardUnblockInterrupts(Adapter) \
NdisRawWritePortUchar(\
((Adapter)->IoAddr+NIC_INTR_MASK), \
(Adapter)->NicInterruptMask)
//++
//
// VOID
// CardAcknowledgeOverflowInterrupt(
// IN PRTL8029_ADAPTER Adapter
// )
//
// Routine Description:
//
// Acknowledges an overflow interrupt by setting the bit in
// the interrupt status (ISR) register. Calls
// SyncCardAcknowledgeOverflow.
//
// Arguments:
//
// Adapter - The adapter block.
//
// Return Value:
//
// None.
//
//--
#define CardAcknowledgeOverflowInterrupt(Adapter) \
SyncCardAcknowledgeOverflow(Adapter)
//++
//
// VOID
// CardAcknowledgeCounterInterrupt(
// IN PRTL8029_ADAPTER Adapter
// )
//
// Routine Description:
//
// Acknowledges a counter interrupt by setting the bit in
// the interrupt status (ISR) register.
//
// Arguments:
//
// Adapter - The adapter block.
//
// Return Value:
//
// None.
//
//--
#define CardAcknowledgeCounterInterrupt(Adapter) \
NdisRawWritePortUchar(((Adapter)->IoAddr+NIC_INTR_STATUS), ISR_COUNTER)
//++
//
// VOID
// CardUpdateCounters(
// IN PRTL8029_ADAPTER Adapter
// )
//
// Routine Description:
//
// Updates the values of the three counters (frame alignment
// errors, CRC errors, and missed packets) by reading in their
// current values from the card and adding them to the ones
// stored in the Adapter structure. Calls SyncCardUpdateCounters.
//
// Arguments:
//
// Adapter - The adapter block.
//
// Return Value:
//
// None.
//
//--
#define CardUpdateCounters(Adapter) \
NdisMSynchronizeWithInterrupt(&(Adapter)->Interrupt, \
SyncCardUpdateCounters, (PVOID)(Adapter))
#endif //
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