intelx86.tbl

在Linux RedHat 6.0 下的 KDevelop 1.1上开发的表格驱动的万用汇编器

/***************************************************************************
               intel_x86.tbl  -  x86 assembler definition file
                             -------------------
    begin                : Mon Apr 24 2000
    copyright            : (C) 2000 by Jan Nikit靚ko
    email                : [e-mail]
 ***************************************************************************/

/***************************************************************************
 *                                                                         *
 *   This program is free software; you can redistribute it and/or modify  *
 *   it under the terms of the GNU General Public License as published by  *
 *   the Free Software Foundation; either version 2 of the License, or     *
 *   (at your option) any later version.                                   *
 *                                                                         *
 ***************************************************************************/

//Endian(BIG);
Endian(LITTLE);

NumberBase binbase(2);
NumberBase octbase(8);
NumberBase decbase(10);
NumberBase hexbase(16);

OperValue hexnum("0x*", hexbase) { Return $0; };
OperValue binnum("bin(*)", binbase) { Return $0; };
OperValue octnum("oct(*)", octbase) { Return $0; };
OperValue decnum("*", decbase) { Return $0; };
OperValOpt number( binnum, octnum, hexnum, decnum ) { };


InstFormat = { [prefixes] opcode [modRM] [disp] [immd] };


Enum AL { "al" };
Enum AX { "ax" };
Enum r8 { "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh" };
Enum r16 { "ax", "cx", "dx", "bx", "sp", "bp", "si", "di" };
Operand i8("*", number) { SetB(immd, $0); };
Operand i16("*", number) { SetW(immd, $0); };

Enum bxbp { "bx", "bp" };
Enum sidi { "si", "di" };
Enum sidibx { "si", "di", "bx"=3 };
Enum baseregs { "si", "di", "bp", "bx" };
Operand bspbs("[*+*]", bxbp, sidi) { OrB(modRM, $1|($0<<1)); };
Operand base("[*]", baseregs) { OrB(modRM, 4|$0); };
Operand basenobp("[*]", sidibx) { OrB(modRM, 4|$0); };
Operand based16("*", number) { SetW(disp, $0); };
Operand based16only("[*]", based16) { OrB(modRM, 4|2); };
OperOption ea00(bspbs, basenobp, based16only) { };

Operand based8("*",number) { SetB(disp, $0); };
Operand bspbspd8("*+*", bspbs, based8) { };
Operand basepd8("*+*", base, based8) { };
OperOption ea01(bspbspd8, basepd8) { OrB(modRM, 1<<6); };

Operand bspbspd16("*+*", bspbs, based16) { };
Operand basepd16("*+*", base, based16) { };
OperOption ea10(bspbspd16, basepd16) { OrB(modRM, 2<<6); };

Operand ea11_r8("*", r8) { OrB(modRM, $0 | (3<<6)); };
Operand ea11_r16("*", r16) { OrB(modRM, $0 | (3<<6)); };

OperOption rm8(ea00, ea01, ea10, ea11_r8) { };
OperOption rm16(ea00, ea01, ea10, ea11_r16) { };

Instructions {
    ("AAA"):                    { SetB(opcode, 0x37); }
    ("AAS"):                    { SetB(opcode, 0x3F); }
    ("AAD"):                    { SetW(opcode, 0x0aD5); }
    ("AAM"):                    { SetW(opcode, 0x0aD4); }
    ("AAD *", i8):              { SetB(opcode, 0xD5); }
    ("AAM *", i8):              { SetB(opcode, 0xD4); }
    ("ADC *,*", AL,i8):         { SetB(opcode, 0x14); }
    ("ADC *,*", AX,i16):        { SetB(opcode, 0x15); }
    ("ADC *,*", r8,rm8):        { SetB(opcode, 0x12); OrB(modRM, $0<<3); }
    ("ADC *,*", r16,rm16):      { SetB(opcode, 0x13); OrB(modRM, $0<<3); }
    ("ADC *,*", rm8,r8):        { SetB(opcode, 0x10); OrB(modRM, $1<<3); }
    ("ADC *,*", rm16,r16):      { SetB(opcode, 0x11); OrB(modRM, $1<<3); }
    ("ADC *,*", rm8,i8):        { SetB(opcode, 0x80); OrB(modRM, 2<<3); }
    ("ADC *,*", rm16,i8):       { SetB(opcode, 0x83); OrB(modRM, 2<<3); }
    ("ADC *,*", rm16,i16):      { SetB(opcode, 0x81); OrB(modRM, 2<<3); }
};




/*  
    //*********** these instructions are not fully defined yet ***************
    //***********        so they are commented out             ***************
    ("ADD *,*", AL,i8):         { SetB(opcode, 0x04); }
    ("ADD *,*", AX,i16):        { SetB(opcode, 0x05); }
    ("ADD *,*", r8,rm8):        { SetB(opcode, 0x02); /r  }
    ("ADD *,*", r16,rm16):      { SetB(opcode, 0x03); /r  }
    ("ADD *,*", rm8,r8):        { SetB(opcode, 0x00); /r  }
    ("ADD *,*", rm16,r16):      { SetB(opcode, 0x01); /r  }
    ("ADD *,*", rm8,i8):        { SetB(opcode, 0x80); /0 ib  }
    ("ADD *,*", rm16,i8):       { SetB(opcode, 0x83); /0 ib  }
    ("ADD *,*", rm16,i16):      { SetB(opcode, 0x81); /0 iw  }
    ("AND *,*", AL,i8):     { SetB(opcode, 0x24); ib  }
    ("AND *,*", AX,i16):        { SetB(opcode, 0x25); iw  }
    ("AND *,*", r8,rm8):        { SetB(opcode, 0x22); /r  }
    ("AND *,*", r16,rm16):      { SetB(opcode, 0x23); /r  }
    ("AND *,*", rm8,r8):        { SetB(opcode, 0x20); /r  }
    ("AND *,*", rm16,r16):      { SetB(opcode, 0x21); /r  }
    ("AND *,*", rm8,i8):        { SetB(opcode, 0x80); /4 ib  }
    ("AND *,*", rm16,i8):       { SetB(opcode, 0x83); /4 ib  }
    ("AND *,*", rm16,i16):      { SetB(opcode, 0x81); /4 iw  }
    ("BOUND *,*", r16,m16&16):      { SetB(opcode, 0x62); /r  }
    ("CALL *", rel16):      { SetB(opcode, 0xE8); cw  }
//