spi.h

嵌入式系统 EP93xx处理器

//****************************************************************************
//
// spi.h - The common spi declaration for ep93xx
//
// Copyright (c) 2006 Cirrus Logic, Inc.
//
//****************************************************************************
#ifndef SPI_H
#define SPI_H


//****************************************************************************
// spi  eeprom operate declaration
//****************************************************************************
typedef struct eeprom {
    char    		manufacture_id;
    char    		device_id;
    void    		(*init)(void);
    int     		(*query)(unsigned int manu_id,unsigned int device_id);
    int     		(*erase)(unsigned int addr, int length);
    int     		(*program)(unsigned int addr, unsigned char *pBuffer, int length);
    unsigned long     	(*read)(unsigned int addr, unsigned char *pBuffer, int length);
 } eeprom_t;

//****************************************************************************
//    Maybe you can add other eeprom support.
//****************************************************************************


typedef struct tSSP
{
    union 
    { // SSP Control register 0
        struct 
        {
            unsigned int DSS:4;			
            unsigned int FRF:2;			
            unsigned int SPO:1;			
            unsigned int SPH:1;			
            unsigned int SCR:8;			
            unsigned int RSVD:16;		
        } Field;
        unsigned int Value;
    } SSPCR0;							

    union 
    { // SSP Control register 1
        struct 
        {
            unsigned int RIE:1;			
            unsigned int TIE:1;			
            unsigned int RORIE:1;		
            unsigned int LBM:1;			
            unsigned int SSE:1;			
            unsigned int MS:1;			
            unsigned int SOD:1;			
            unsigned int RSVD:25;		
        } Field;
        unsigned int Value;
    } SSPCR1;							

    union 
    { // SSP Data register
        struct 
        {
            unsigned int DATA:16;		
            unsigned int RSVD:16;		
        } Field;
        unsigned int Value;
    } SSPDR;							

    union 
    { // SSP Status register
        struct 
        {
            unsigned int TFE:1;			
            unsigned int TNF:1;			
            unsigned int RNE:1;			
            unsigned int RFF:1;			
            unsigned int BSY:1;			
            unsigned int RSVD:27;		
        } Field;
        unsigned int Value;
    } SSPSR;							

    union 
    { // SSP clock prescale register
        struct 
        {
            unsigned int CPSDVSR:8;		
            unsigned int RSVD:24;		
        } Field;
        unsigned int Value;
    } SSPCPSR;							
    
    union 
    { // SSP interrupt identification register
        struct 
        {
            unsigned int RIS:1;			
            unsigned int TIS:1;			
            unsigned int RORIS:1;		
            unsigned int RSVD:13;		
        } Field;
        unsigned int Value;				
    } SSPIIR;							

//
// Test registers
//
	unsigned int const SSPTCER[(-(0x0040-0x007C))>>2];    

	union
    { // SSP Test control register
        struct 
        {
        	unsigned int TESTEN:1;		
            unsigned int TESTCLKEN:1;	
            unsigned int REGCLK:1;		
            unsigned int TESTRST:1;		
            unsigned int TESTINPSEL:1;          
            unsigned int RSVD:27;       
        } Field;
        unsigned int Value;
    } SSPTCR;							
    
   	union
    { // SSP Test mode register
        struct 
        {
            unsigned int NIBMODE:1;		
            unsigned int CPSCNIBMODE:1;	
            unsigned int RSVD:30;		
        } Field;
        unsigned int Value;
    } SSPTMR;							

	union
    { // SSP Test input stimulus register
        struct 
        {
            unsigned int SSPRXD:1;		
            unsigned int SFRMIN:1;		
            unsigned int SCLKIN:1;		
            unsigned int RSVD:29;
        } Field;
        unsigned int Value;
    } SSPTISR;							

	union
    { // SSP Test output capture register
        struct 
        {
            unsigned int SFRMOUT:1;		
            unsigned int SCLKOUT:1;		
            unsigned int SSPTXD:1;		
            unsigned int SSPOE:1;		
            unsigned int SSPINTR:1;		
            unsigned int SSPCTLOE:1;	
            unsigned int RSVD:26; 		                                                                       
        } Field;
        unsigned int Value;
    } SSPTOCR;							

	union
    { // SSP Test clock prescale counter register
        struct 
        {
            unsigned int SSPCPSC:6;		
            unsigned int RSVD:26;		
        } Field;
        unsigned int Value;
    } SSPTCPCR;							

} SSP;

//-----------------------------------------------------------------------------
// Global Register Anchor Definitions
//-----------------------------------------------------------------------------
static volatile SSP	* const SSP1	= (SSP *)      0x808A0000;


#endif // SPI_H