boot.s

嵌入式系统 EP93xx处理器

//*****************************************************************************
//
// BOOT.S - Code which is loaded into the Cirrus Logic ARM processor via the
//          boot ROM to 2048 Bytes buffer.
//
// Copyright (c) 2006 Cirrus Logic, Inc.
//
//*****************************************************************************

#include "asmdefs.h"

//*****************************************************************************
//
// The read-only code area.
//
//*****************************************************************************
    _TEXT_

    //
    // This is the entry point of the program.
    //
    _ENTRY_

    //
    // Set up the stack pointer.
    //
    ldr     r13, =Stack

    //
    // Switch to SetUp.
    //
    b       SetUp

//*****************************************************************************
//
// Configure the SDRAM based on the supplied settings.
//
//*****************************************************************************
SdramConfig _LABEL_
    //
    // Set the Initialize and MRS bits
    //
    ldr     r4, =0x80000003
    str     r4, [r3, _CONST_ 0x0004]

    //
    // Delay for 200us.
    //
    mov     r4, _CONST_ 0x3000
delay1 _LABEL_
        subs    r4, r4, _CONST_ 1
        bne     delay1

    //
    // Clear the MRS bit to issue a precharge all.
    //
    ldr     r4, =0x80000001
    str     r4, [r3, _CONST_ 0x0004]

    //
    // Temporarily set the refresh timer to 0x10.
    // Make it really low so that refresh cycles are generated.
    //
    ldr     r4, =0x10
    str     r4, [r3, _CONST_ 0x0008]

    //
    // Delay for at least 80 SDRAM clock cycles.
    //
    mov     r4, _CONST_ 80
delay2 _LABEL_
        subs    r4, r4, _CONST_ 1
        bne     delay2

    //
    // Set the refresh timer to the fastest required for any device that might
    // be used.
    //
    ldr     r4, =0x01e0
    str     r4, [r3, _CONST_ 0x0008]

    //
    // Select mode register update mode.
    //
    ldr     r4, =0x80000002
    str     r4, [r3, _CONST_ 0x0004]

    //
    // Program the mode register on the SDRAM.
    //
    ldr     r4, [r2]

    //
    // Select normal operating mode.
    //
    ldr     r4, =0x80000000
    str     r4, [r3, _CONST_ 0x0004]

    //
    // Return to the caller.
    //
    mov     pc, lr
    
//*****************************************************************************
//
// Test to see if the SDRAM has been configured in a usable mode.
//
//*****************************************************************************
SdramDetect _LABEL_
    //
    // Load the test patterns to be written to SDRAM.
    //
    ldr     r1, =0xf00dface
    ldr     r2, =0xdeadbeef
    ldr     r3, =0x08675309
    ldr     r4, =0xdeafc0ed

    //
    // Store the test patterns to SDRAM.
    //
    stmia   r0, {r1-r4}

    //
    // Load the test patterns from SDRAM one at a time
    // compare them to the actual pattern.
    //
    ldr     r5, [r0]
    cmp     r5, r1
    ldreq   r5, [r0, #0x0004]
    cmpeq   r5, r2
    ldreq   r5, [r0, #0x0008]
    cmpeq   r5, r3
    ldreq   r5, [r0, #0x000c]
    cmpeq   r5, r4

    //
    // Return -1 if a mismatch was encountered, 0 otherwise.
    //
    mvnne   r0, _CONST_ 0x00000000
    moveq   r0, _CONST_ 0x00000000

    //
    // Return to the caller.
    //
    mov     pc, lr

//****************************************************************************
//
// SendChar sends a character to UART1.
//
//****************************************************************************
SendChar _LABEL_
    //
    // Load the base address to the UART 1 registers. 0x808c0000
    //
    ldr     r1, =0x808c0000

    //
    // Wait until the FIFO is empty.
    //
    mov     r3, _CONST_ 0x80
sendchar0 _LABEL_
        ldr     r2, [r1, _CONST_ 0x18]
        tst     r2, r3
        beq     sendchar0

    //
    // Write the character to UART1.
    //
    str     r0, [r1]

    //
    // Return to the caller.
    //
    mov     pc, lr

//****************************************************************************
//
// ReceiveChar receives a character from UART1.
//
//****************************************************************************
ReceiveChar _LABEL_
    //
    // Load the base address to the UART 1 registers. 0x808c0000
    //
    ldr     r1, =0x808c0000

    //
    // Wait until there is a character in the receive FIFO for UART1.
    //
    mov     r3, _CONST_ 0x10
receivechar0 _LABEL_
        ldr     r2, [r1, _CONST_ 0x18]
        tst     r2, r3
        bne     receivechar0

    //
    // Read the character from UART1.
    //
    ldr     r0, [r1]
    mov     r1, _CONST_ 0xff
    and     r0, r0, r1

    //
    // Return to the caller.
    //
    mov     pc, lr

//****************************************************************************
//
// SetBaud sets the baud rate to the specified rate.
//
//****************************************************************************
SetBaud _LABEL_
    //
    // Save the link register to the stack.
    //
    stmfd   r13!, {lr}

    //
    // Read the baud rate indicator from the host.
    //
    bl      ReceiveChar

    //
    // Load a pointer to the UART 1 Flag register.
    // 0x808c0018 UARTFR
    //
    ldr     r3, =0x808c0000

    //
    // Get the baud rate divisor based on the requested baud rate.
    //

    //
    // Is this 9600 Baud?
    //
    mov     r1, _CONST_ 47
    cmp     r0, _CONST_ 0x30
    beq     setbaud0

    //
    // Is this 19200 Baud?
    //
    mov     r1, _CONST_ 23
    cmp     r0, _CONST_ 0x31
    beq     setbaud0

    //
    // Is this 38400 Baud?
    //
    mov     r1, _CONST_ 11
    cmp     r0, _CONST_ 0x32
    beq     setbaud0

    //
    // Is this 57600 Baud?
    //
    mov     r1, _CONST_ 7
    cmp     r0, _CONST_ 0x33
    beq     setbaud0

    //
    // Well it is going to be 115200 Baud then.
    //
    mov     r1, _CONST_ 0x03

    //
    // Set the data length to 8 bits per character and enable the FIFO.
    //
setbaud0 _LABEL_

    //
    // Set the baud rate divider.
    //
    str     r1, [r3, _CONST_ 0x10]

    //
    // Clear the upper baud divisor register
    //
    mov     r1, _CONST_ 0
    str     r1, [r3, _CONST_ 0xc]

    //
    // Set the mode to N-8-1
    //
    mov     r1, _CONST_ 0x60
    str     r1, [r3, _CONST_ 0x8]

    //
    // Wait until we receive a '-' character from the host.
    //
setbaud1 _LABEL_
        bl      ReceiveChar
        cmp     r0, _CONST_ 0x2d
        bne     setbaud1

    //
    // Return to the caller.
    //
    ldmfd   r13!, {pc}

//****************************************************************************
//
// ReadLong reads a 32-bit value from the serial port.
//
//****************************************************************************
ReadLong _LABEL_
    //
    // Save the link register to the stack.
    //
    stmfd   r13!, {r4, lr}

    //
    // Read the first byte.
    //
    bl      ReceiveChar

    //
    // The first byte is the least significant 8 bits of the long value.
    //
    mov     r4, r0

    //
    // Read the second byte.
    //
    bl      ReceiveChar

    //
    // The second byte is the next 8 significant bits of the long value.
    //
    mov     r0, r0, lsl _CONST_ 8
    orr     r4, r4, r0

    //
    // Read the third byte.
    //
    bl      ReceiveChar

    //
    // The third byte is the next 8 significant bits of the long value.
    //
    mov     r0, r0, lsl _CONST_ 16
    orr     r4, r4, r0

    //
    // Read the fourth byte.
    //
    bl      ReceiveChar

    //
    // The fourth byte is the most significant 8 bits of the long value.
    //
    mov     r0, r0, lsl _CONST_ 24
    orr     r0, r0, r4

    //