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📄 main.asm

📁 sunplus e_bike demo
💻 ASM
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		bcc		L_CPM_1
		jmp		L_CPM_Next_0

L_CPM_1:
		sta		G_Temp_0
		jmp		L_CPM_Next_1
L_CPM_Next_0:	

		cmp		G_Temp_1			
		bcs		L_CPM_4
		jmp		L_CPM_Next_1
L_CPM_4:
		sta		G_Temp_1
L_CPM_Next_1:
		dey		
		bne		L_CPM_Loop_0
		
		lda		#0
		sta		G_Temp_2
		sta		G_Temp_3
		
		clc
		ldy		#3
L_ADD_LOOP:	
		lda		(G_AD_QueueADD),Y
		adc		G_Temp_2		
		sta		G_Temp_2
		lda		G_Temp_3
		adc		#0
		sta		G_Temp_3
		dey		
		bpl		L_ADD_LOOP
		
		sec
		lda		G_Temp_2
		sbc		G_Temp_0
		sta		G_Temp_2
		lda		G_Temp_3
		sbc		#0
		sta		G_Temp_3

		sec
		lda		G_Temp_2
		sbc		G_Temp_1
		sta		G_Temp_2
		lda		G_Temp_3
		sbc		#0
		sta		G_Temp_3
		
		lsr		G_Temp_3
		ror		G_Temp_2			
		rts

;****************************************
;	Applied Body	: SPMC65P2404A
;	Firmware version: V1.0
;	Programer		: 
;	Date			: 2006/09/15	
;	Description		: AD4 DETECT PROCESS 
;	Hardware Connect: SPMC65 BLDC demo board	 
;	IDE Version		: v1.6.8	
;	BODY Version	: v1.0.2A
;****************************************
F_AD4_Detect:   						  
        lda     #(C_AD_CE+ C_AD_Ch4)	  
        sta     P_AD_Ctrl2                
        nop  
        lda     #10000100b                
        sta     P_AD_Ctrl0

L_AD4_Detect0:               
        tst     P_AD_Ctrl0,0
        beq     L_AD4_Detect0                
   
        lda     P_AD_DataHi 
        sta		G_AD_Register
       
		lda		#G_AD4_Queue
		sta		G_AD_QueueADD
		lda		#00h
		sta		G_AD_QueueADD+1
		jsr		F_AD_Queue_Data_Disposal
        lda		G_Temp_2
        sta		G_ADC4_Buf 
;.IFDEF	U_Modulate_Enable
;		cmp		#$7f
;		bcc		OFF_Modulate
;		set		P_IOB_Data,Modulate
;	 	jmp		ModulateEnd1
;OFF_Modulate:
;	 	clr		P_IOB_Data,Modulate
;ModulateEnd1:	 	
;.ENDIF
        rts	
;
F_AD4_Detect_HallBar:   						  
        lda     #(C_AD_CE+ C_AD_Ch4)	  
        sta     P_AD_Ctrl2                
        nop  
        lda     #10000100b                
        sta     P_AD_Ctrl0

L_Wait_AD4_0:               
        tst     P_AD_Ctrl0,0
        beq     L_Wait_AD4_0            
   
        lda     P_AD_DataHi 
        ;sta		G_AD_Register
		rts
		
F_16BitDivid8Bit:			;(use 64us)
        lda     G_Divid0
        bne     L_DivideStart
        jmp     L_Divide_End
L_DivideStart:
        lda     #11h
        sta     G_Shift
        lda     #00h
        sta     G_Divided2
        clc
L_DividLoop:
        rol     G_Divided0
        rol     G_Divided1
        rol     G_Divided2
        dec     G_Shift
        beq     L_Divide_End                 ;
        lda     G_Divided2
        cmp     G_Divid0
        bcc     L_DividLoop
        sbc     G_Divid0
        sta     G_Divided2
        jmp		L_DividLoop
;
L_Divide_End:
        rts              
;
;****************************************
;	Applied Body	: SPMC65P2404A
;	Firmware version: V1.0
;	Programer		: WAVELIU
;	Date			: 2006/09/15	
;	Description		:   120	degree /60 degree	Check  	
;*    					 PC3 (1) = 120   degree           
;*	  					 PC3 (0) = 60    degree  	
;	Hardware Connect: SPMC65 BLDC demo board	 
;	IDE Version		: v1.6.8	
;	BODY Version	: v1.0.2A
;****************************************
;F_Phase_InitMode:
;		tst		P_IOC_Data,HALL_60_OR_120;pc3=0,60 degree,clear flag
;		beq		L_Phase_InitMode1		 ;pc3=1,120 degree,slect flag
;		set     G_Hall_Flag,CB_Hall120Or60_Flag	
										 ;120 degree operation 
;		jmp		L_Phase_InitMode_End
;		
;L_Phase_InitMode1:
;		clr     G_Hall_Flag,CB_Hall120Or60_Flag	
										 ;60  degree operation 	
;L_Phase_InitMode_End:			
;		rts
;

F_EBS_InitMode:
		set     G_BrakeError_Buf,CB_EbsEnable_Flag
L_EBS_InitMode_End:			
		rts

F_InitPWM_Compresense:
		lda		#C_PWM_60DgreeCOMPRESS_LIMIT	;60 dgree pwm compress max time
		sta		G_60DgreePwmCompressMinBuf
		
		lda		#C_PWM_120DgreeCOMPRESS_LIMIT	;120 dgree pwm compress max time
		sta		G_120DgreePwmCompressMinBuf
		
		lda		#C_PWM_COMPRESS_MAX	   			
		sta		G_PwmCompressMaxBuf
		
		lda		#C_PWM_COMPRESS_IOver			
		sta		G_PwmCompressIOverBuf
		rts
;

F_IintWDT:
		lda     #(C_WDT_SCKEN+C_WDT_Div_512)
		sta		P_WDT_Ctrl
		sta		P_WDT_Ctrl
		rts	
;
	
F_ClearRAM:
		lda		#$0
		ldx		#$60
?Loop:
		sta		$0, X
		inx
		bne		?Loop
		rts
		
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++=
F_InitTimeRAM:
        lda		#C_HFSEC
        sta		G_4Ms_Count			;0.5S count init
        lda		#C_250MS
        sta		G_250Ms_Count		;250 ms init
        lda		#C_1SEC
        sta		G_500Ms_Count		;1 sec count init
       	lda		#C_20MS				;20mSec counter increase 
		sta		G_20Ms_Count
		lda		#C_1250MS			;250mSec counter increase 
		sta		G_1250Ms_Count
		lda		#C_2SEC				;20mSec counter increase 
		sta		G_2S_Count			;
		lda		#C_3SEC				;20mSec counter increase 
		sta		G_3S_Count			;
        rts
;

F_InitIOPort:
		lda		#_PORTA_DATA
		sta		P_IOA_Data		

		lda		#_PORTB_DATA
		sta		P_IOB_Data
		
		lda		#_PORTC_DATA
		sta		P_IOC_Data
		
		lda		#_PORTD_DATA
		sta		P_IOD_Data
;		
		lda		#_PORTA_DIR
		sta		P_IOA_Dir	
		
		lda		#_PORTB_DIR
		sta		P_IOB_Dir				; all input port
		
		lda		#_PORTC_DIR				;
		sta		P_IOC_Dir
		
		lda		#_PORTD_DIR
		sta		P_IOD_Dir
		
		lda		#_PIOA_Attrib
		sta		P_IOA_Attrib
		
		lda		#_PIOB_Attrib
		sta		P_IOB_Attrib
		
		lda		#_PIOC_Attrib
		sta		P_IOC_Attrib
		
		lda		#_PIOD_Attrib
		sta		P_IOD_Attrib
;	

		lda		#$0						; setup INT_OC, falling edge trigger								
		sta		P_IRQ_Opt1				; use NMI interrupt service routine
		sta		P_IRQ_Opt1				
		set		P_INT_Ctrl0, CB_INT_IRQ0IE	
		rts
;

F_InitTMR0:
		lda		#d8h												
		sta		P_TMR0_Preload			;(9b) 100u ;(c6) 74u															
		
		lda		#f8h
		and		P_TMR0_1_Ctrl1			
		ora		#C_T0FCS_Div_4		 	
		sta		P_TMR0_1_Ctrl1		
		
		jsr		F_Close_Timer0	
		rts																		
;		
;

F_InitTMR1:
		lda		#$FE																	
		sta		P_TMR1_DutyPeriod		

		lda		#$00							
		sta		P_TMR1_PWMPeriod		

		lda		#$FF					
		sta		P_TMR1_PWMDuty			
;		
		lda		#07h
		and		P_TMR0_1_Ctrl1
		ora		#C_T1FCS_Div_1			
		sta		P_TMR0_1_Ctrl1
		TurnOnPWM
		rts		
;

F_InitTMB:	
		lda		#C_TBASE_Div_8k		    ;
		sta		P_BUZ_Ctrl   		    ;interrupt rate = 1.024 ms		
		rts
;
		
F_InitTMR2_3:
		lda		#(C_T28B_Timer+C_T316B_CAP);
		sta		P_TMR2_3_Ctrl0
		
		lda		#(C_T2FCS_Div_4+C_T3FCS_Div_32)
										
		sta		P_TMR2_3_Ctrl1
		
		lda		#256-150				;interrupt rate = 600 us		
		sta		P_TMR2_Preload			
				
		lda     #0		
		sta		P_TMR3_Cap
		sta     P_TMR3_CapHi

		set		P_INT_Ctrl1, CB_INT_T2OIE 		
			
		set     P_INT_Ctrl0, CB_INT_CAP3IE		
		
		set     P_IRQ_Opt1,CB_IRQOpt1_CAP3ES		
		set     P_IRQ_Opt1,CB_IRQOpt1_CAP3ES	
												
		rts
;

F_InitADC:
		lda		#11010000B 				 
		sta		P_AD_Ctrl1				
		
		lda		#(C_AD_CE) 				
		sta		P_AD_Ctrl2				  
;
		jsr     F_Delay5ms		          

		lda		#(C_AD_EN + C_AD_CS_8)
		sta		P_AD_Ctrl0				  
        lda     P_AD_Ctrl0              
        and		#11111110B				 
        sta     P_AD_Ctrl0
		rts	
;

;
T_SLOT_TSK:
		DW      F_TSLOT0                 ; time slot 0 task, Protect control
        DW      F_TSLOT1                 ; time slot 1 task, Speed control process 
        DW      F_TSLOT2                 ; time slot 2 task, Motor brake process
        DW      F_TSLOT3                 ; time slot 3 task, Battery Voltage AD detect                    
;                                   

F_Alarm_InitMode:
;L_StopAlarm_Loop:
		tst		P_IOA_Data,ALARM_LOCK      ;ALARM_LOCK=0,zhe z=1
		beq		L_Alarm_InitMode_End	;z=1,zhe L_Alarm_InitMode_End
	
	;	lda		G_Alarm_Cnt
	;	cmp		#$01
	;	beq		L_Alarm_Process_Start
		
		lda 	#15
		JSR	  	F_Delaysec
;L_Alarm_Process_Start:
		
		jsr     F_close_Control
		set		G_Monitor,CB_Alarm_Flag
L_StopAlarm_Loop:		
		lda		G_Alarm_Cnt
		cmp		#$01
		beq		L_Alarm_Process
		inc		G_Alarm_Cnt
		lda		P_IOC_Data					
		and		#HALL_MASK1
		sta		G_Hall_Alarm_Pos
		jmp		L_Alarm_End
		
L_Alarm_Process:
        lda		P_IOC_Data					
		and		#HALL_MASK1
        cmp		G_Hall_Alarm_Pos
        beq		L_Shake_Check
        sta		G_Hall_Alarm_Pos
        inc		G_Alarm_Hall_Cnt
        lda		G_Alarm_Hall_Cnt
        cmp		#$1f
        beq		L_Alarm_Start
        jmp		L_Shake_Check
L_Alarm_Start:
        lda		#$0
        sta		G_Alarm_Hall_Cnt
        set		P_IOB_Data,Alarm_LED
        lda 	#15
		JSR	    F_Delaysec
		jmp		L_Alarm_Finish
		
L_Shake_Check:		
		tst		P_IOB_Data,Alarm_EN      ;Alarm_EN=0,zhe z=1  Pb1=0,Alarm ,clear flag 
		bne		L_Alarm_Finish		 ;z=1,zhe L_Alarm_InitMode1  Pb1=1,Normal ,slect flag
		set    	P_IOB_Data,Alarm_LED	
		lda 	#15
		jsr	    F_Delaysec
		
L_Alarm_Finish:
		clr     P_IOB_Data,Alarm_LED		;Alarm_LED=1
										 ;Normal operation 
L_Alarm_End:
		jsr     F_Clear_Wdt			   ; clear watch dog   
		tst		P_INT_Flag2, CB_INT_ITVALIF	
		beq		L_Alarm_End			   ; no, end IRQ check
		jmp		L_StopAlarm_Loop

L_Alarm_InitMode_End:
		lda		#$0
		sta		G_Alarm_Cnt
        sta		G_Alarm_Hall_Cnt
        clr     P_IOB_Data,Alarm_LED
        ;clr		G_Monitor,CB_Alarm_Flag			
		rts		
;
; 
;F_Alarm_InitMode1:
;		tst		P_IOA_Data,ALARM_LOCK      ;ALARM_LOCK=0,zhe z=1
;		beq		L_Alarm_InitMode_End	;z=1,zhe L_Alarm_InitMode_End
;		jsr     F_close_Control	              
;****************************************
;*										*
;*		F_Delay8sec			*
;*										*
;****************************************
F_Delaysec:
?L_LOOP:
pha        ;1 cycles------------------------------------------\
ldy #4     ;2 cycles------------------------------------------+
?L_1S:     ;-----------------------------------------------------+
tya 		;2 cycles \ +
pha 		;1 cycles + +
lda #50 	;2 cycles + +
jsr F_Delay5ms 		;1989756 cycles + +
pla 				;1 cycles + =7959075 cycles +
tay 				;2 cycles + + = 7959090
dey 				;2 cycles + + cycles
bne ?L_1S 			;2/3 cycles / +
					; +
pla 				;1 cycles-----------------------------------------+
sec 				;1 cycles-----------------------------------------+
sbc #1 				;2 cycles-----------------------------------------+
bne ?L_LOOP 		;2/3 cycles-----------------------------------------+
?L_Delay_End: 		;------------------------------------------------------+
rts 				;6 cycles-------------------------------------------/

;****************************************
;*										*
;*		F_close_Control			*
;*										*
;****************************************
F_close_Control:
		CLR	P_IOD_Buf,2		;UP= 0	   U相  上面的MOS管 导通
		CLR	P_IOA_Buf,2     ;UN= 0	   U相  下面的MOS管 导通
		CLR	P_IOA_Buf,0     ;WN= 0	   W相  下面的MOS管 导通
		CLR	P_IOD_Buf,0     ;WP= 0     W相  上面的MOS管 导通
		CLR	P_IOD_Buf,1     ;VP= 0     V相  上面的MOS管 导通
		CLR	P_IOA_Buf,1     ;VN= 0	   V相  下面的MOS管 导通	 
		rts
;****************************************
;*										*
;*		Interrupt Vector Table			*
;*										*
;****************************************
VECTOR:			.SECTION     
		DW		V_NMI					; Non-mask interrupt vector(no use)
		DW		V_Reset					; Reset vector
		DW		V_IRQ					; IRQ interrupt vector

;****************************************
;*										*
;*		End Of Interrupt Vector Table	*
;*										*
;****************************************
.END									; end of program

 

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