target.h

itron操作系统在日本用的很多

/*------------------------------------------------------

    Port P9 register

------------------------------------------------------*/

union byte_def p9_addr;

#define     p9      p9_addr.byte



#define     p9_0        p9_addr.bit.b0      /* Port P90 register */

#define     p9_1        p9_addr.bit.b1      /* Port P91 register */

#define     p9_2        p9_addr.bit.b2      /* Port P92 register */

#define     p9_3        p9_addr.bit.b3      /* Port P93 register */

#define     p9_4        p9_addr.bit.b4      /* Port P94 register */

#define     p9_5        p9_addr.bit.b5      /* Port P95 register */

#define     p9_6        p9_addr.bit.b6      /* Port P96 register */

#define     p9_7        p9_addr.bit.b7      /* Port P97 register */



/*------------------------------------------------------

    Port P9 direction register

------------------------------------------------------*/

union byte_def pd9_addr;

#define     pd9     pd9_addr.byte



#define     pd9_0       pd9_addr.bit.b0     /* Port P90 direction register */

#define     pd9_1       pd9_addr.bit.b1     /* Port P91 direction register */

#define     pd9_2       pd9_addr.bit.b2     /* Port P92 direction register */

#define     pd9_3       pd9_addr.bit.b3     /* Port P93 direction register */

#define     pd9_4       pd9_addr.bit.b4     /* Port P94 direction register */

#define     pd9_5       pd9_addr.bit.b5     /* Port P95 direction register */

#define     pd9_6       pd9_addr.bit.b6     /* Port P96 direction register */

#define     pd9_7       pd9_addr.bit.b7     /* Port P97 direction register */



/*------------------------------------------------------

    Port P10 register

------------------------------------------------------*/

union byte_def p10_addr;

#define     p10     p10_addr.byte



#define     p10_0       p10_addr.bit.b0     /* Port P100 register */

#define     p10_1       p10_addr.bit.b1     /* Port P101 register */

#define     p10_2       p10_addr.bit.b2     /* Port P102 register */

#define     p10_3       p10_addr.bit.b3     /* Port P103 register */

#define     p10_4       p10_addr.bit.b4     /* Port P104 register */

#define     p10_5       p10_addr.bit.b5     /* Port P105 register */

#define     p10_6       p10_addr.bit.b6     /* Port P106 register */

#define     p10_7       p10_addr.bit.b7     /* Port P107 register */



/*------------------------------------------------------

    Port P10 direction register

------------------------------------------------------*/

union byte_def pd10_addr;

#define     pd10        pd10_addr.byte



#define     pd10_0      pd10_addr.bit.b0    /* Port P100 direction register */

#define     pd10_1      pd10_addr.bit.b1    /* Port P101 direction register */

#define     pd10_2      pd10_addr.bit.b2    /* Port P102 direction register */

#define     pd10_3      pd10_addr.bit.b3    /* Port P103 direction register */

#define     pd10_4      pd10_addr.bit.b4    /* Port P104 direction register */

#define     pd10_5      pd10_addr.bit.b5    /* Port P105 direction register */

#define     pd10_6      pd10_addr.bit.b6    /* Port P106 direction register */

#define     pd10_7      pd10_addr.bit.b7    /* Port P107 direction register */



/*------------------------------------------------------

    Pull-up control register 0

------------------------------------------------------*/

union byte_def pur0_addr;

#define     pur0        pur0_addr.byte



#define     pu00        pur0_addr.bit.b0    /* P00 to P03 pull-up */

#define     pu01        pur0_addr.bit.b1    /* P04 to P07 pull-up */

#define     pu02        pur0_addr.bit.b2    /* P10 to P13 pull-up */

#define     pu03        pur0_addr.bit.b3    /* P14 to P17 pull-up */

#define     pu04        pur0_addr.bit.b4    /* P20 to P23 pull-up */

#define     pu05        pur0_addr.bit.b5    /* P24 to P27 pull-up */

#define     pu06        pur0_addr.bit.b6    /* P30 to P33 pull-up */

#define     pu07        pur0_addr.bit.b7    /* P34 to P37 pull-up */



/*------------------------------------------------------

    Pull-up control register 1

------------------------------------------------------*/

union byte_def pur1_addr;

#define     pur1        pur1_addr.byte



#define     pu10        pur1_addr.bit.b0    /* P40 to P43 pull-up */

#define     pu11        pur1_addr.bit.b1    /* P44 to P47 pull-up */

#define     pu12        pur1_addr.bit.b2    /* P50 to P53 pull-up */

#define     pu13        pur1_addr.bit.b3    /* P54 to P57 pull-up */

#define     pu14        pur1_addr.bit.b4    /* P60 to P63 pull-up */

#define     pu15        pur1_addr.bit.b5    /* P64 to P67 pull-up */

#define     pu16        pur1_addr.bit.b6    /* P70 to P73 pull-up (Except P70,P71 ; P70,P71 -> N-channel open drain ports)*/

#define     pu17        pur1_addr.bit.b7    /* P74 to P77 pull-up */



/*------------------------------------------------------

    Pull-up control register 2

------------------------------------------------------*/

union byte_def pur2_addr;

#define     pur2        pur2_addr.byte



#define     pu20        pur2_addr.bit.b0    /* P80 to P83 pull-up */

#define     pu21        pur2_addr.bit.b1    /* P84 to P87 pull-up (Except P85) */

#define     pu22        pur2_addr.bit.b2    /* P90 to P93 pull-up */

#define     pu23        pur2_addr.bit.b3    /* P94 to P97 pull-up */

#define     pu24        pur2_addr.bit.b4    /* P100 to P103 pull-up */

#define     pu25        pur2_addr.bit.b5    /* P104 to P107 pull-up */



/*------------------------------------------------------

    Port control register

------------------------------------------------------*/

union byte_def pcr_addr;

#define     pcr     pcr_addr.byte



#define     pcr0        pcr_addr.bit.b0     /* Port P1 control register */



/*------------------------------------------------------

    UARTi bit rate generators (i=0 to 2) ; Use "MOV" instruction when writing to these registers.

------------------------------------------------------*/

union byte_def u0brg_addr;

#define     u0brg       u0brg_addr.byte



union byte_def u1brg_addr;

#define     u1brg       u1brg_addr.byte



union byte_def u2brg_addr;


#define     u2brg       u2brg_addr.byte



/*------------------------------------------------------

    SI/Oi bit rate generators (i=3,4) ; Use "MOV" instruction when writing to these registers.

------------------------------------------------------*/

union byte_def s3brg_addr;

#define     s3brg       s3brg_addr.byte



union byte_def s4brg_addr;

#define     s4brg       s4brg_addr.byte



/*------------------------------------------------------

    SI/Oi transmit/receive registers (i=3,4)

------------------------------------------------------*/

union byte_def s3trr_addr;

#define     s3trr       s3trr_addr.byte



union byte_def s4trr_addr;

#define     s4trr       s4trr_addr.byte



/********************************************************

*   declare SFR union                                   *

********************************************************/



/*------------------------------------------------------

    DMAi control register union

------------------------------------------------------*/

union{

    struct{

        char    dmbit:1;            /* Transfer unit bit select bit */

        char    dmasl:1;            /* Repeat transfer mode select bit */

        char    dmas:1;             /* DMA request bit */

        char    dmae:1;             /* DMA enable bit */

        char    dsd:1;              /* Source address direction select bit */

        char    dad:1;              /* Destination address direction select bit */

        char    b6:1;

        char    b7:1;

    }bit;

    char    byte;

}dm0con_addr,dm1con_addr;

/*------------------------------------------------------

     dm0con

------------------------------------------------------*/

#define     dm0con      dm0con_addr.byte



#define     dmbit_dm0con    dm0con_addr.bit.dmbit   /* Transfer unit bit select bit */

#define     dmasl_dm0con    dm0con_addr.bit.dmasl   /* Repeat transfer mode select bit */

#define     dmas_dm0con     dm0con_addr.bit.dmas    /* DMA request bit */

#define     dmae_dm0con     dm0con_addr.bit.dmae    /* DMA enable bit */

#define     dsd_dm0con      dm0con_addr.bit.dsd     /* Source address direction select bit */

#define     dad_dm0con      dm0con_addr.bit.dad     /* Destination address direction select bit */



/*------------------------------------------------------

     dm1con

------------------------------------------------------*/

#define     dm1con      dm1con_addr.byte



#define     dmbit_dm1con    dm1con_addr.bit.dmbit   /* Transfer unit bit select bit */

#define     dmasl_dm1con    dm1con_addr.bit.dmasl   /* Repeat transfer mode select bit */

#define     dmas_dm1con     dm1con_addr.bit.dmas    /* DMA request bit */

#define     dmae_dm1con     dm1con_addr.bit.dmae    /* DMA enable bit */

#define     dsd_dm1con      dm1con_addr.bit.dsd     /* Source address direction select bit */

#define     dad_dm1con      dm1con_addr.bit.dad     /* Destination address direction select bit */



/*------------------------------------------------------

    interrupt control registers

------------------------------------------------------*/

union{

    struct{

        char    ilvl0:1;            /* Interrupt priority level select bit */

        char    ilvl1:1;            /* Interrupt priority level select bit */

        char    ilvl2:1;            /* Interrupt priority level select bit */

        char    ir:1;               /* Interrupt request bit */

        char    pol:1;              /* Polarity select bit */

        char    lvs:1;

        char    b6:1;

        char    b7:1;

    }bit;

    char    byte;

}bcnic_addr,dm0ic_addr,dm1ic_addr,kupic_addr,adic_addr,

 s2tic_addr,s2ric_addr,s0tic_addr,s0ric_addr,s1tic_addr,s1ric_addr,

 s3ic_addr,s4ic_addr,

 ta0ic_addr,ta1ic_addr,ta2ic_addr,ta3ic_addr,ta4ic_addr,

 tb0ic_addr,tb1ic_addr,tb2ic_addr,tb3ic_addr,tb4ic_addr,tb5ic_addr,

 int0ic_addr,int1ic_addr,int2ic_addr,int3ic_addr,int4ic_addr,int5ic_addr;



/*------------------------------------------------------

     bcnic

------------------------------------------------------*/

#define     bcnic       bcnic_addr.byte



#define     ilvl0_bcnic bcnic_addr.bit.ilvl0    /* Interrupt priority level select bit */

#define     ilvl1_bcnic bcnic_addr.bit.ilvl1    /* Interrupt priority level select bit */

#define     ilvl2_bcnic bcnic_addr.bit.ilvl2    /* Interrupt priority level select bit */

#define     ir_bcnic    bcnic_addr.bit.ir       /* Interrupt request bit */



/*------------------------------------------------------

     dm0ic

------------------------------------------------------*/

#define     dm0ic       dm0ic_addr.byte



#define     ilvl0_dm0ic dm0ic_addr.bit.ilvl0    /* Interrupt priority level select bit */

#define     ilvl1_dm0ic dm0ic_addr.bit.ilvl1    /* Interrupt priority level select bit */

#define     ilvl2_dm0ic dm0ic_addr.bit.ilvl2    /* Interrupt priority level select bit */

#define     ir_dm0ic    dm0ic_addr.bit.ir       /* Interrupt request bit */



/*------------------------------------------------------

     dm1ic

------------------------------------------------------*/

#define     dm1ic       dm1ic_addr.byte



#define     ilvl0_dm1ic dm1ic_addr.bit.ilvl0    /* Interrupt priority level select bit */

#define     ilvl1_dm1ic dm1ic_addr.bit.ilvl1    /* Interrupt priority level select bit */

#define     ilvl2_dm1ic dm1ic_addr.bit.ilvl2    /* Interrupt priority level select bit */

#define     ir_dm1ic    dm1ic_addr.bit.ir       /* Interrupt request bit */



/*------------------------------------------------------

     kupic

------------------------------------------------------*/

#define     kupic       kupic_addr.byte



#define     ilvl0_kupic kupic_addr.bit.ilvl0    /* Interrupt priority level select bit */

#define     ilvl1_kupic kupic_addr.bit.ilvl1    /* Interrupt priority level select bit */

#define     ilvl2_kupic kupic_addr.bit.ilvl2    /* Interrupt priority level select bit */

#define     ir_kupic    kupic_addr.bit.ir       /* Interrupt request bit */



/*------------------------------------------------------

     adic

------------------------------------------------------*/

#define     adic        adic_addr.byte



#define     ilvl0_adic  adic_addr.bit.ilvl0     /* Interrupt priority level select bit */

#define     ilvl1_adic  adic_addr.bit.ilvl1     /* Interrupt priority level select bit */

#define     ilvl2_adic  adic_addr.bit.ilvl2     /* Interrupt priority level select bit */

#define     ir_adic     adic_addr.bit.ir        /* Interrupt request bit */



/*------------------------------------------------------

     s2tic

------------------------------------------------------*/

#define     s2tic       s2tic_addr.byte



#define     ilvl0_s2tic s2tic_addr