📄 mega_c_lst
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io registers + interrupt vector numbers header files
ja 2002/09/25
Files for Mega AVRs supported:
iom8v.h (defines __iom8v_h)
iom8515v.h (defines __iom8515v_h)
iom8535v.h (defines __iom8535v_h)
iom16v.h (defines __iom16v_h)
iom161v.h (defines __iom161v_h)
iom162v.h (defines __iom162v_h)
iom163v.h (defines __iom163v_h)
iom169v.h (defines __iom169v_h)
iom32v.h (defines __iom32v_h)
iom323v.h (defines __iom323v_h)
iom64v.h (defines __iom64v_h)
iom103v.h (defines __iom103v_h)
iom128v.h (defines __iom128v_h)
- ioat94kv.h (FPSLIC) moved to specials_c_lst -
Interrupt vector number names included in
-iom8v.h
#define iv_INT0 2
#define iv_INT1 3
#define iv_TIMER2_COMP 4
#define iv_TIMER2_OVF 5
#define iv_TIMER1_CAPT 6
#define iv_TIMER1_COMPA 7
#define iv_TIMER1_COMPB 8
#define iv_TIMER1_OVF 9
#define iv_TIMER0_OVF 10
#define iv_SPI_STC 11
#define iv_USART_RX 12
#define iv_USART_RXC 12
#define iv_USART_DRE 13
#define iv_USART_UDRE 13
#define iv_USART_TX 14
#define iv_USART_TXC 14
#define iv_ADC 15
#define iv_EE_RDY 16
#define iv_EE_READY 16
#define iv_ANA_COMP 17
#define iv_ANALOG_COMP 17
#define iv_TWI 18
#define iv_TWSI 18
#define iv_SPM_RDY 19
#define iv_SPM_READY 19
-iom8515v.h
#define iv_INT0 2
#define iv_INT1 3
#define iv_TIMER1_CAPT 4
#define iv_TIMER1_COMPA 5
#define iv_TIMER1_COMPB 6
#define iv_TIMER1_OVF 7
#define iv_TIMER0_OVF 8
#define iv_SPI_STC 9
#define iv_USART_RX 10
#define iv_USART_RXC 10
#define iv_USART_DRE 11
#define iv_USART_UDRE 11
#define iv_USART_TX 12
#define iv_USART_TXC 12
#define iv_ANA_COMP 13
#define iv_ANALOG_COMP 13
#define iv_INT2 14
#define iv_TIMER0_COMP 15
#define iv_EE_RDY 16
#define iv_EE_READY 16
#define iv_SPM_RDY 17
#define iv_SPM_READY 17
-iom8535v.h
-iom16v.h
#define iv_INT0 2
#define iv_INT1 3
#define iv_TIMER2_COMP 4
#define iv_TIMER2_OVF 5
#define iv_TIMER1_CAPT 6
#define iv_TIMER1_COMPA 7
#define iv_TIMER1_COMPB 8
#define iv_TIMER1_OVF 9
#define iv_TIMER0_OVF 10
#define iv_SPI_STC 11
#define iv_USART_RX 12
#define iv_USART_RXC 12
#define iv_USART_DRE 13
#define iv_USART_UDRE 13
#define iv_USART_TX 14
#define iv_USART_TXC 14
#define iv_ADC 15
#define iv_EE_RDY 16
#define iv_EE_READY 16
#define iv_ANA_COMP 17
#define iv_ANALOG_COMP 17
#define iv_TWI 18
#define iv_TWSI 18
#define iv_INT2 19
#define iv_TIMER0_COMP 20
#define iv_SPM_RDY 21
#define iv_SPM_READY 21
-iom161v.h
#define iv_INT0 2
#define iv_INT1 3
#define iv_INT2 4
#define iv_TIMER2_COMP 5
#define iv_TIMER2_OVF 6
#define iv_TIMER1_CAPT 7
#define iv_TIMER1_COMPA 8
#define iv_TIMER1_COMPB 9
#define iv_TIMER1_OVF 10
#define iv_TIMER0_COMP 11
#define iv_TIMER0_OVF 12
#define iv_SPI_STC 13
#define iv_UART0_RX 14
#define iv_UART0_RXC 14
#define iv_UART1_RX 15
#define iv_UART1_RXC 15
#define iv_UART0_DRE 16
#define iv_UART0_UDRE 16
#define iv_UART1_DRE 17
#define iv_UART1_UDRE 17
#define iv_UART0_TX 18
#define iv_UART0_TXC 18
#define iv_UART1_TX 19
#define iv_UART1_TXC 19
#define iv_EE_RDY 20
#define iv_EE_READY 20
#define iv_ANA_COMP 21
#define iv_ANALOG_COMP 21
-iom162v.h
#define iv_INT0 2
#define iv_INT1 3
#define iv_INT2 4
#define iv_PCINT0 5
#define iv_PCINT1 6
#define iv_TIMER3_CAPT 7
#define iv_TIMER3_COMPA 8
#define iv_TIMER3_COMPB 9
#define iv_TIMER3_OVF 10
#define iv_TIMER2_COMP 11
#define iv_TIMER2_OVF 12
#define iv_TIMER1_CAPT 13
#define iv_TIMER1_COMPA 14
#define iv_TIMER1_COMPB 15
#define iv_TIMER1_OVF 16
#define iv_TIMER0_COMP 17
#define iv_TIMER0_OVF 18
#define iv_SPI_STC 19
#define iv_USART0_RX 20
#define iv_USART0_RXC 20
#define iv_USART1_RX 21
#define iv_USART1_RXC 21
#define iv_USART0_DRE 22
#define iv_USART0_UDRE 22
#define iv_USART1_DRE 23
#define iv_USART1_UDRE 23
#define iv_USART0_TX 24
#define iv_USART0_TXC 24
#define iv_USART1_TX 25
#define iv_USART1_TXC 25
#define iv_EE_RDY 26
#define iv_EE_READY 26
#define iv_ANA_COMP 27
#define iv_ANALOG_COMP 27
#define iv_SPM_RDY 28
#define iv_SPM_READY 28
-iom163v.h
#define iv_INT0 2
#define iv_INT1 3
#define iv_TIMER2_COMP 4
#define iv_TIMER2_OVF 5
#define iv_TIMER1_CAPT 6
#define iv_TIMER1_COMPA 7
#define iv_TIMER1_COMPB 8
#define iv_TIMER1_OVF 9
#define iv_TIMER0_OVF 10
#define iv_SPI_STC 11
#define iv_UART_RX 12
#define iv_UART_RXC 12
#define iv_UART_DRE 13
#define iv_UART_UDRE 13
#define iv_UART_TX 14
#define iv_UART_TXC 14
#define iv_ADC 15
#define iv_EE_RDY 16
#define iv_EE_READY 16
#define iv_ANA_COMP 17
#define iv_ANALOG_COMP 17
#define iv_TWI 18
#define iv_TWSI 18
-iom169v.h
#define iv_INT0 2
#define iv_PC_INT0 3
#define iv_PC_INT1 4
#define iv_TIMER2_COMPA 5
#define iv_TIMER2_COMP 5
#define iv_TIMER2_OVF 6
#define iv_TIMER1_CAPT 7
#define iv_TIMER1_COMPA 8
#define iv_TIMER1_COMPB 9
#define iv_TIMER1_OVF 10
#define iv_TIMER0_COMPA 11
#define iv_TIMER0_COMP 11
#define iv_TIMER0_OVF 12
#define iv_SPI_STC 13
#define iv_UART_RX 14
#define iv_UART_RXC 14
#define iv_UART0_RXC 14
#define iv_UART_DRE 15
#define iv_UART_UDRE 15
#define iv_UART0_UDRE 15
#define iv_UART_TX 16
#define iv_UART_TXC 16
#define iv_UART0_TXC 16
#define iv_USI_START 17
#define iv_USI_OVF 18
#define iv_ANA_COMP 19
#define iv_ANALOG_COMP 19
#define iv_ADC 20
#define iv_EE_RDY 21
#define iv_EE_READY 21
#define iv_SPM_RDY 22
#define iv_SPM_READY 22
#define iv_LCD_FRAME 23
-iom32v.h
-iom323v.h
#define iv_INT0 2
#define iv_INT1 3
#define iv_INT2 4
#define iv_TIMER2_COMP 5
#define iv_TIMER2_OVF 6
#define iv_TIMER1_CAPT 7
#define iv_TIMER1_COMPA 8
#define iv_TIMER1_COMPB 9
#define iv_TIMER1_OVF 10
#define iv_TIMER0_COMP 11
#define iv_TIMER0_OVF 12
#define iv_SPI_STC 13
#define iv_USART_RX 14
#define iv_USART_RXC 14
#define iv_USART_DRE 15
#define iv_USART_UDRE 15
#define iv_USART_TX 16
#define iv_USART_TXC 16
#define iv_ADC 17
#define iv_EE_RDY 18
#define iv_EE_READY 18
#define iv_ANA_COMP 19
#define iv_ANALOG_COMP 19
#define iv_TWI 20
#define iv_TWSI 20
#define iv_SPM_RDY 21 // on mega32 only !!
#define iv_SPM_READY 21
-iom103v.h
#define iv_INT0 2
#define iv_INT1 3
#define iv_INT2 4
#define iv_INT3 5
#define iv_INT4 6
#define iv_INT5 7
#define iv_INT6 8
#define iv_INT7 9
#define iv_TIMER2_COMP 10
#define iv_TIMER2_OVF 11
#define iv_TIMER1_CAPT 12
#define iv_TIMER1_COMPA 13
#define iv_TIMER1_COMPB 14
#define iv_TIMER1_OVF 15
#define iv_TIMER0_COMP 16
#define iv_TIMER0_OVF 17
#define iv_SPI_STC 18
#define iv_UART_RX 19
#define iv_UART_RXC 19
#define iv_UART_DRE 20
#define iv_UART_UDRE 20
#define iv_UART_TX 21
#define iv_UART_TXC 21
#define iv_ADC 22
#define iv_EE_RDY 23
#define iv_EE_READY 23
#define iv_ANA_COMP 24
#define iv_ANALOG_COMP 24
-iom64v.h
-iom128v.h
#define iv_INT0 2
#define iv_INT1 3
#define iv_INT2 4
#define iv_INT3 5
#define iv_INT4 6
#define iv_INT5 7
#define iv_INT6 8
#define iv_INT7 9
#define iv_TIMER2_COMP 10
#define iv_TIMER2_OVF 11
#define iv_TIMER1_CAPT 12
#define iv_TIMER1_COMPA 13
#define iv_TIMER1_COMPB 14
#define iv_TIMER1_OVF 15
#define iv_TIMER0_COMP 16
#define iv_TIMER0_OVF 17
#define iv_SPI_STC 18
#define iv_USART0_RX 19
#define iv_USART0_RXC 19
#define iv_USART0_DRE 20
#define iv_USART0_UDRE 20
#define iv_USART0_TX 21
#define iv_USART0_TXC 21
#define iv_ADC 22
#define iv_EE_RDY 23
#define iv_EE_READY 23
#define iv_ANA_COMP 24
#define iv_ANALOG_COMP 24
#define iv_TIMER1_COMPC 25
#define iv_TIMER3_CAPT 26
#define iv_TIMER3_COMPA 27
#define iv_TIMER3_COMPB 28
#define iv_TIMER3_COMPC 29
#define iv_TIMER3_OVF 30
#define iv_USART1_RX 31
#define iv_USART1_RXC 31
#define iv_USART1_DRE 32
#define iv_USART1_UDRE 32
#define iv_USART1_TX 33
#define iv_USART1_TXC 33
#define iv_TWI 34
#define iv_TWSI 34
#define iv_SPM_RDY 35
#define iv_SPM_READY 35
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