📄 idctmmx.c
字号:
#include "config.h"
#include "global.h"
//////////////////////////////////////////////////////////////////////
// not functional
//////////////////////////////////////////////////////////////////////
// MPEG2AVI
// --------
// v0.16B34
// performance optimization, idct_mmx32_rows() and idct_mmx32_cols() now
// transpose their respective outputs "in-place" (saves a bit of time)
//
// v0.16B33 initial release
//
// MMX32 iDCT algorithm (IEEE-1180 compliant) :: idct_mmx32()
//
// This IDCT implementation is based on Intel Application Note AP-922.
//
// This file implements the idct algorithm with no transpose.
// The other file (idctmm32_transpose.c) is faster, but transposes the
// output-matrix. (Intel's code-listing produces a transposed output.)
//
// ALGORITHM OVERVIEW
// ------------------
// This was one of the harder pieces of work to code.
// Intel's app-note focuses on the numerical theory/issues of the IDCT
// implementation, but assumes the programmer is familiar with the
// requisite mathematics, leaving the exact form of the complete IDCT
// code-listing up to the programmer's imagination.
//
// I played around with Intel's code-fragments for quite a few hours.
// This file is *A* working IDCT implementation, but it may not be
// the implementation Intel originally intended. Rest assured, I've
// done everything in my power to guarantee its correctness.
// This implementation passes all six IEEE accuracy tests by a fair margin.
//
// My IDCT algorithm consists of 4 steps:
//
// 1) IDCT-row transformation (using the IDCT-row function) on all 8 rows
// This yields an intermediate 8x8 matrix.
//
// 2) transpose of intermediate matrix (mandatory)
//
// 3) IDCT-row transformation (2nd time) on all 8 rows of the
// intermediate matrix.
// At this point, we have the final-result, in transposed form.
//
// 4) post-transformation matrix transpose
// (not necessary if the input-data is already transposed, this could
// be done during the MPEG "zig-zag" scan, but since my algorithm
// requires at least one transpose operation, why not re-use the
// transpose-code.)
//
// Although the (1st) and (3rd) steps use the same basic row-transform
// operation, the (3rd) step uses different shift&round constants
// (explained later.)
//
// Also note that the intermediate transpose (2) would not be neccessary,
// if the subsequent operation were a iDCT-column transformation. Since
// we only have the iDCT-row transform, we transpose the intermediate
// matrix and use the iDCT-row transform a 2nd time. I suppose one
// a faster (but more complicated) code-implementation is possible,
// if these steps were merged.
//
// I had to change some constants/variables for my method to work :
//
// As given by Intel, #SHIFT_INV_COL and #RND_INV_COL are wrong.
// Not surprising since I'm probably implementing the IDCT in
// perverse fashion.
// round_inv_col[], which is given as "4 short" values, should have the
// same dimensions as round_inv_row[]. The corrected variables are
// shown.
//
// Intel's code defines 4 tables of constants. My code only uses only
// one of these tables, row#0.
//
// IMPLEMENTATION DETAILs
// ----------------------
//
// I divided the 4-steps of my algorithm into two subroutines,
// 1) idct_mmx32_rows() - transforms 8 rows, then transpose
// 2) idct_mmx32_cols() - transforms 8 rows, then transpose
// yields final result ("drop-in" direct replacement for INT32 IDCT)
//
// idct_mmx32_cols() is a carbon-copy of idct_mmx32_rows(), i.e. both
// execute a row-by-row transformations. Only the shift&rounding
// coefficients differ.
//
// In the 1st function (rows), the shift & round instructions use
// SHIFT_INV_ROW & round_inv_row[] (renamed to r_inv_row[])
//
// In the 2nd function (cols)-> r_inv_col[], and
// SHIFT_INV_COL & round_inv_col[] (renamed to r_inv_col[])
//
// Each function contains an integrated transpose-operator, which comes
// AFTER the primary transformation operation. In the future, I'll optimize
// the code to do more of the transpose-work "in-place". Right now, I've
// left the code as two subroutines and a main calling function, so other
// people can read the code more easily.
//;=============================================================================
//;
//; AP-922 http://developer.intel.com/vtune/cbts/strmsimd
//; These examples contain code fragments for first stage iDCT 8x8
//; (for rows) and first stage DCT 8x8 (for columns)
//;
//;=============================================================================
#define BITS_INV_ACC 5 // 4 or 5 for IEEE
// 5 yields higher accuracy, but lessens dynamic range on the input matrix
#define SHIFT_INV_ROW (16 - BITS_INV_ACC)
#define SHIFT_INV_COL (1 + BITS_INV_ACC )
#define RND_INV_ROW (1 << (SHIFT_INV_ROW-1))
#define RND_INV_COL (1 << (SHIFT_INV_COL-1))
#define RND_INV_CORR (RND_INV_COL - 1)
const static int r_inv_row[2] = { RND_INV_ROW, RND_INV_ROW};
const static int r_inv_col[2] = {RND_INV_COL, RND_INV_COL};
const static int r_inv_corr[2] = {RND_INV_CORR, RND_INV_CORR};
#define mword qword
#define mptr mword ptr
#define BITS_FRW_ACC 3 // 2 or 3 for accuracy
#define SHIFT_FRW_COL BITS_FRW_ACC
#define SHIFT_FRW_ROW BITS_FRW_ACC + 17
#define RND_FRW_ROW 262144 * (BITS_FRW_ACC - 1) // 1 << (SHIFT_FRW_ROW-1)
static const short tab_i_01234567[] = {
16384, 16384, 16384, -16384, 21407, 8867, 8867, -21407,
16384, -16384, 16384, 16384, -8867, 21407, -21407, -8867,
22725, 12873, 19266, -22725, 19266, 4520, -4520, -12873,
12873, 4520, 4520, 19266, -22725, 19266, -12873, -22725,
};
static const short tab_i_04[] = { 16384, 16384, 16384, -16384, // movq-> w06 w04 w02 w00
21407, 8867, 8867, -21407, // w07 w05 w03 w01
16384, -16384, 16384, 16384, // w14 w12 w10 w08
-8867, 21407, -21407, -8867, // w15 w13 w11 w09
22725, 12873, 19266, -22725, // w22 w20 w18 w16
19266, 4520, -4520, -12873, // w23 w21 w19 w17
12873, 4520, 4520, 19266, // w30 w28 w26 w24
-22725, 19266, -12873, -22725, // w31 w29 w27 w25
};
static const short tab_i_17[] = { 22725, 22725, 22725, -22725, // movq-> w06 w04 w02 w00
29692, 12299, 12299, -29692, // w07 w05 w03 w01
22725, -22725, 22725, 22725, // w14 w12 w10 w08
-12299, 29692, -29692, -12299, // w15 w13 w11 w09
31521, 17855, 26722, -31521, // w22 w20 w18 w16
26722, 6270, -6270, -17855, // w23 w21 w19 w17
17855, 6270, 6270, 26722, // w30 w28 w26 w24
-31521, 26722, -17855, -31521, // w31 w29 w27 w25
};
static const short tab_i_26 [] = { 21407, 21407, 21407, -21407, // movq-> w06 w04 w02 w00
27969, 11585, 11585, -27969 ,// w07 w05 w03 w01
21407, -21407, 21407, 21407, // w14 w12 w10 w08
-11585, 27969, -27969, -11585, // w15 w13 w11 w09
29692, 16819, 25172, -29692, // w22 w20 w18 w16
25172, 5906, -5906, -16819, // w23 w21 w19 w17
16819, 5906, 5906, 25172, // w30 w28 w26 w24
-29692, 25172, -16819, -29692, // w31 w29 w27 w25
};
static const short tab_i_35 [] = { 19266, 19266, 19266, -19266, // movq-> w06 w04 w02 w00
25172, 10426, 10426, -25172, // w07 w05 w03 w01
19266, -19266, 19266, 19266, // w14 w12 w10 w08
-10426, 25172, -25172, -10426,// w15 w13 w11 w09
26722, 15137, 22654, -26722,// w22 w20 w18 w16
22654, 5315, -5315, -15137, // w23 w21 w19 w17
15137, 5315, 5315, 22654, // w30 w28 w26 w24
-26722, 22654, -15137, -26722,// w31 w29 w27 w25
};
static const short one_corr[] ={1, 1, 1, 1};
static const unsigned int round_inv_row [] = { RND_INV_ROW, RND_INV_ROW };
static const short round_inv_col[] = { RND_INV_COL, RND_INV_COL, RND_INV_COL, RND_INV_COL};
static const short round_inv_corr[] = { RND_INV_CORR, RND_INV_CORR, RND_INV_CORR, RND_INV_CORR};
static const unsigned int round_frw_row[] = { RND_FRW_ROW, RND_FRW_ROW};
static const short tg_1_16[] = {13036, 13036, 13036, 13036}; // tg * (2<<16) + 0.5
static const short tg_2_16[] = {27146, 27146, 27146, 27146} ; //tg * (2<<16) + 0.5
static const short tg_3_16[] = {-21746, -21746, -21746, -21746} ; //tg * (2<<16) + 0.5
static const short cos_4_16[] = {-19195, -19195, -19195, -19195} ; //cos * (2<<16) + 0.5
static const short ocos_4_16[] = {23170, 23170, 23170, 23170} ; //cos * (2<<15) + 0.5
static const short otg_3_16[] = { 21895, 21895, 21895, 21895 } ; //tg * (2<<16) + 0.5
//; assume SHIFT_INV_ROW == 11
static const unsigned int rounder_0[] ={ 65536, 65536};
static const unsigned int rounder_4[] ={ 0, 0};
static const unsigned int rounder_1[] ={ 3597, 3597};
static const unsigned int rounder_7[] ={ 512, 512};
static const unsigned int rounder_2[] ={ 2260, 2260};
static const unsigned int rounder_6[] ={ 512, 512};
static const unsigned int rounder_3[] ={ 1203, 1203};
static const unsigned int rounder_5[] ={ 120, 120};
#define INP eax
#define OUT ecx
#define TABLE ebx
#define ROUNDER edx
#define DCT_8_INV_ROW __asm { \
__asm movq mm0, mptr [INP] \
__asm movq mm1, mptr [INP+8] \
__asm movq mm2, mm0 \
__asm movq mm3, mptr [TABLE] \
__asm punpcklwd mm0, mm1 \
__asm movq mm5, mm0 \
__asm punpckldq mm0, mm0 \
__asm movq mm4, mptr [TABLE+8] \
__asm punpckhwd mm2, mm1 \
__asm pmaddwd mm3, mm0 \
__asm movq mm6, mm2 \
__asm movq mm1, mptr [TABLE+32] \
__asm punpckldq mm2, mm2 \
__asm pmaddwd mm4, mm2 \
__asm punpckhdq mm5, mm5 \
__asm pmaddwd mm0, mptr [TABLE+16] \
__asm punpckhdq mm6, mm6 \
__asm movq mm7, mptr [TABLE+40] \
__asm pmaddwd mm1, mm5 \
__asm paddd mm3, mptr [ROUNDER] \
__asm pmaddwd mm7, mm6 \
__asm pmaddwd mm2, mptr [TABLE+24] \
__asm paddd mm3, mm4 \
__asm pmaddwd mm5, mptr [TABLE+48] \
__asm movq mm4, mm3 \
__asm pmaddwd mm6, mptr [TABLE+56] \
__asm paddd mm1, mm7 \
__asm paddd mm0, mptr [ROUNDER] \
__asm psubd mm3, mm1 \
__asm psrad mm3, SHIFT_INV_ROW \
__asm paddd mm1, mm4 \
__asm paddd mm0, mm2 \
__asm psrad mm1, SHIFT_INV_ROW \
__asm paddd mm5, mm6 \
__asm movq mm4, mm0 \
__asm paddd mm0, mm5 \
__asm psubd mm4, mm5 \
__asm psrad mm0, SHIFT_INV_ROW \
__asm psrad mm4, SHIFT_INV_ROW \
__asm packssdw mm1, mm0 \
__asm packssdw mm4, mm3 \
__asm movq mm7, mm4 \
__asm psrld mm4, 16 \
__asm pslld mm7, 16 \
__asm movq mptr [OUT], mm1 \
__asm por mm7, mm4 \
__asm movq mptr [OUT+8], mm7 \
}
#define DCT_8_INV_COL_4 __asm { \
__asm movq mm0, qword ptr tg_3_16 \
__asm movq mm3, mword ptr [INP+16*3] \
__asm movq mm1, mm0 \
__asm movq mm5, mword ptr [INP+16*5] \
__asm pmulhw mm0, mm3 \
__asm movq mm4, mword ptr tg_1_16 \
__asm pmulhw mm1, mm5 \
__asm movq mm7, mword ptr [INP+16*7] \
__asm movq mm2, mm4 \
__asm movq mm6, mword ptr [INP+16*1] \
__asm pmulhw mm4, mm7 \
__asm paddsw mm0, mm3 \
__asm pmulhw mm2, mm6 \
__asm paddsw mm1, mm3 \
__asm psubsw mm0, mm5 \
__asm movq mm3, mword ptr ocos_4_16 \
__asm paddsw mm1, mm5 \
__asm paddsw mm4, mm6 \
__asm psubsw mm2, mm7 \
__asm movq mm5, mm4 \
__asm movq mm6, mm2 \
__asm paddsw mm5, mm1 \
__asm psubsw mm6, mm0 \
__asm psubsw mm4, mm1 \
__asm paddsw mm2, mm0 \
__asm movq mm7, mword ptr tg_2_16 \
__asm movq mm1, mm4 \
__asm movq mword ptr [OUT+3*16], mm5 \
__asm paddsw mm1, mm2 \
__asm movq mword ptr [OUT+5*16], mm6 \
__asm psubsw mm4, mm2 \
__asm movq mm5, mword ptr [INP+2*16] \
__asm movq mm0, mm7 \
__asm movq mm6, mword ptr [INP+6*16] \
__asm pmulhw mm0, mm5 \
__asm pmulhw mm7, mm6 \
__asm pmulhw mm1, mm3 \
__asm movq mm2, mword ptr [INP+0*16] \
__asm pmulhw mm4, mm3 \
__asm psubsw mm0, mm6 \
__asm movq mm3, mm2 \
__asm movq mm6, mword ptr [INP+4*16] \
__asm paddsw mm7, mm5 \
__asm paddsw mm2, mm6 \
__asm psubsw mm3, mm6 \
__asm movq mm5, mm2 \
__asm movq mm6, mm3 \
__asm psubsw mm2, mm7 \
__asm paddsw mm3, mm0 \
__asm paddsw mm1, mm1 \
__asm paddsw mm4, mm4 \
__asm paddsw mm5, mm7 \
__asm psubsw mm6, mm0 \
__asm movq mm7, mm3 \
__asm movq mm0, mm6 \
__asm paddsw mm3, mm1 \
__asm paddsw mm6, mm4 \
__asm psraw mm3, SHIFT_INV_COL \
__asm psubsw mm7, mm1 \
__asm psraw mm6, SHIFT_INV_COL \
__asm psubsw mm0, mm4 \
__asm movq mm1, mword ptr [OUT+3*16] \
__asm psraw mm7, SHIFT_INV_COL \
__asm movq mm4, mm5 \
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -