smsc.h

dm642网络传输程序

//--------------------------------------------------------------------------
// IP Stack
//--------------------------------------------------------------------------
// smsc.h
//
// SMSC Sample Packet Driver
// (Untested sample code)
//
// Author: Michael A. Denio
//         Andre Schnarrenberger
// Copyright 2002 by Texas Instruments Inc.
//-------------------------------------------------------------------------

//
// Platform Configurations
//

#ifdef DSK6711
#define HW_CE_VALUE     0x41244422
#define HW_CLOCKRATE    150
#endif

#ifdef DSK6713
#define HW_CE_VALUE     0x30d34322
#define HW_CLOCKRATE    225
#endif

#ifdef TEB6416
#define HW_CE_VALUE     0x41244422
#define HW_CLOCKRATE    500
#endif

#ifdef DSK6416
#define HW_CE_VALUE     0x41244422
#define HW_CLOCKRATE    600
#endif


//
// Global Configurations
//

#define HW_CE_REG    ((unsigned int*)0x1800010)

#define HW_IVAL         4           // Hardware interrupt index
#define HW_IFLAG        (1<<(HW_IVAL))
#define HW_IEDMAFLAG    (1<<8)      // Set to the EDMA interrupt
                                    // (For use with smsc111f.c only)

#define SMSC_EDMA_CHANNEL_NUMBER        4
#define SMSC_EEPROM_INSTALLED           1

#define EXTINT_POLARITY_LOWHIGH    0 // INT signal from LAN91C111 uninverted
#define EXTINT_POLARITY_HIGHLOW    1 // INT signal from LAN91C111 inverted
#define SMSC_EXTINT_POLARITY            EXTINT_POLARITY_HIGHLOW

// SMSC Base Address
#define SBA         0xa0000300

// Special IER functions
uint gmDisableIER( uint mask );
void gmEnableIER( uint mask );

// SMSC register read/write MACROS
#define SMSC_READ8(b,x)        (*(volatile unsigned char *)((b)+(x)))
#define SMSC_WRITE8(b,x,y)     (*(volatile unsigned char *)((b)+(x)) = (y))
#define SMSC_READ16(b,x)       (*(volatile unsigned short *)((b)+(x)))
#define SMSC_WRITE16(b,x,y)    (*(volatile unsigned short *)((b)+(x)) = (y))
#define SMSC_READ32(b,x)       (*(volatile unsigned int *)((b)+(x)))
#define SMSC_WRITE32(b,x,y)    (*(volatile unsigned int *)((b)+(x)) = (y))

//----------------------------------------------------------------------------
// SMSC LAN91C111 Ethernet MAC
//----------------------------------------------------------------------------

// Control Byte
#define CONTROLBYTE_ODD             0x20
#define CONTROLBYTE_CRC             0x10

// Reveive Status word
#define ALIGN_ERROR                 0x8000
#define BROADCAST                   0x4000
#define BAD_CRC                     0x2000
#define ODD_FRAME                   0x1000
#define TOO_LONG                    0x0800
#define TOO_SHORT                   0x0400
#define RSTATUS_ANY_ERROR           0xAC00


//----------------------------------------------------------------------------
// SMSC LAN91C111 Ethernet MAC - Register Definitions
//----------------------------------------------------------------------------

#define SMSC_BANK_SELECT            0xe

#define SMSC_TRANSMIT_CONTROL       0x0     // Bank 0, 16 bits
#define TXENA                       0x0001
#define FDUPLX                      0x0800
#define EPHLOOP                     0x2000

#define SMSC_EPH_STATUS             0x2     // Bank 0, 16 bits

#define SMSC_RECEIVE_CONTROL        0x4     // Bank 0, 16 bits
#define SOFT_RST                    0x8000
#define RXEN                        0x0100
#define ALMUL                       0x0004
#define PRMS                        0x0002
#define RX_ABORT                    0x0001

#define SMSC_PHY_CONTROL            0xa     // Bank 0, 16 bits
#define SPEED                       0x2000
#define DPLX                        0x1000
#define ANEG                        0x0800
#define LS2A                        0x0080
#define LS1A                        0x0040
#define LS0A                        0x0020
#define LS2B                        0x0010
#define LS1B                        0x0008
#define LS0B                        0x0004

#define SMSC_CONFIGURATION          0x0     // Bank 1, 16 bits
#define CONFIGURATION_DEFAULT       0xb0b1

#define SMSC_IAR0                   0x4     // Bank 1, 8 bits
#define SMSC_IAR1                   0x5     // Bank 1, 8 bits
#define SMSC_IAR2                   0x6     // Bank 1, 8 bits
#define SMSC_IAR3                   0x7     // Bank 1, 8 bits
#define SMSC_IAR4                   0x8     // Bank 1, 8 bits
#define SMSC_IAR5                   0x9     // Bank 1, 8 bits

#define SMSC_CONTROL                0xc     // Bank 1, 16 bits
#define RCV_BAD                     0x4000
#define AUTO_RELEASE                0x0800
#define LE_ENABLE                   0x0080
#define CR_ENABLE                   0x0040
#define TE_ENABLE                   0x0020
#define EEPROM_SELECT               0x0004
#define RELOAD                      0x0002
#define STORE                       0x0001

#define SMSC_MMU_COMMAND            0x0     // Bank 2, 16 bits
#define CMD_ALLOCATE_MEMORY         0x0020
#define CMD_RESET_MMU               0x0040
#define CMD_REM_RX_FRAME            0x0060
#define CMD_REMREL_RX_FRAME         0x0080
#define CMD_RELEASE_PACKET          0x00a0
#define CMD_ENQUEUE_PACKET          0x00c0
#define CMD_RESET_FX_FIFO           0x00e0
#define BUSY_BIT                    0x0001

#define SMSC_PACKET_NUMBER          0x2     // Bank 2, 8 bits

#define SMSC_ALLOC_RESULT           0x3     // Bank 2, 8 bits
#define FAILED                      0x80

#define SMSC_TX_FIFO_PACKET         0x4     // Bank 2, 8 bits
#define TEMPTY                      0x80

#define SMSC_RX_FIFO_PACKET         0x5     // Bank 2, 8 bits
#define REMPTY                      0x80

#define SMSC_POINTER                0x6     // Bank 2, 16 bits
#define RCV                         0x8000
#define AUTO_INCR                   0x4000
#define READ                        0x2000
#define ETEN                        0x1000
#define NOT_EMPTY                   0x0800
#define POINTER_MASK                0x07FF

#define SMSC_DATA                   0x8     // Bank 2, 32 bits

#define SMSC_INT_STATUS             0xc     // Bank 2, 8 bits
#define MDINT                       0x80
#define ERCV_INT                    0x40
#define EPH_INT                     0x20
#define RX_OVRN_INT                 0x10
#define ALLOC_INT                   0x08
#define TX_EMPTY_INT                0x04
#define TX_INT                      0x02
#define RCV_INT                     0x01

#define SMSC_INT_MASK               0xd     // Bank 2, 8 bits

#define SMSC_MULTICAST_TABLE        0x0     // Bank 3, 8 bits

#define SMSC_MGMT                   0x8     // Bank 3, 16 bits
#define MGMT_DEFAULT                0x3330
#define MSK_CRS100                  0x4000
#define MGMT_MODE                   0x0008
#define MGMT_MCLK                   0x0004
#define MGMT_MDI                    0x0002
#define MGMT_MDO                    0x0001