232toudp.lst

网卡控制器ENC28J60的AVR单片机ATmega16程序源代码(c),实现232toUDP功能,有非常详细的注释.

    0401 E001      LDI	R16,1
    0402 940E0667  CALL	_Write_Control_Register
(0166)  
(0167)  enc28j60SetBank(0x01);//因为EPKTCNT寄存器在Bank1.
    0404 E001      LDI	R16,1
    0405 940E06F4  CALL	_enc28j60SetBank
(0168)  EPKTCNT=Read_Control_Register(ETH,0x19);//读取EPKTCNT值
    0407 E129      LDI	R18,0x19
    0408 2700      CLR	R16
    0409 940E0648  CALL	_Read_Control_Register
    040B 93000067  STS	0x67,R16
(0169)  }
    040D 940E075F  CALL	pop_gset2
    040F 9508      RET
_ENC28J60_Initialize:
  state                --> R20
    0410 940E0768  CALL	push_gset1
    0412 9721      SBIW	R28,1
(0170) 
(0171) 
(0172) //##############################28J60初始化程序###########################//
(0173) void ENC28J60_Initialize(void)
(0174) {uchar state=0;
    0413 2744      CLR	R20
(0175)  Reset_28J60();//软复位
    0414 940E0639  CALL	_Reset_28J60
(0176)  delay(2);//28J60复位要一定的时间
    0416 E002      LDI	R16,2
    0417 940E0617  CALL	_delay
    0419 C005      RJMP	0x041F
(0177)  while((state&0x01)==0)state=Read_Control_Register(ETH,0x1D);
    041A E12D      LDI	R18,0x1D
    041B 2700      CLR	R16
    041C 940E0648  CALL	_Read_Control_Register
    041E 2F40      MOV	R20,R16
    041F FF40      SBRS	R20,0
    0420 CFF9      RJMP	0x041A
(0178)  //读状态寄存器ESTAT,确认CLKRDY时钟就绪位置1，确保已稳定，才能进行对MAC和PHY修改
(0179)  
(0180)  Write_Control_Register(0x08,0x00);//ERXSTL
    0421 2722      CLR	R18
    0422 E008      LDI	R16,0x8
    0423 940E0667  CALL	_Write_Control_Register
(0181)  Write_Control_Register(0x09,0x08);//ERXSTH,ERXST指针指定接收数据包放在RAM中的开始位置
    0425 E028      LDI	R18,0x8
    0426 E009      LDI	R16,0x9
    0427 940E0667  CALL	_Write_Control_Register
(0182)  Write_Control_Register(0x0C,0x00);//ERXRDPTL
    0429 2722      CLR	R18
    042A E00C      LDI	R16,0xC
    042B 940E0667  CALL	_Write_Control_Register
(0183)  Write_Control_Register(0x0D,0x08);//ERXRDPTH,与ERXST值要保持相同
    042D E028      LDI	R18,0x8
    042E E00D      LDI	R16,0xD
    042F 940E0667  CALL	_Write_Control_Register
(0184)  Write_Control_Register(0x00,0x00);//ERDPTL
    0431 2722      CLR	R18
    0432 2700      CLR	R16
    0433 940E0667  CALL	_Write_Control_Register
(0185)  Write_Control_Register(0x01,0x08);//ERDPTH，读数据包指针起始位置
    0435 E028      LDI	R18,0x8
    0436 E001      LDI	R16,1
    0437 940E0667  CALL	_Write_Control_Register
(0186)   
(0187)  Write_Control_Register(0x0A,0xff);//ERXNDL
    0439 EF2F      LDI	R18,0xFF
    043A E00A      LDI	R16,0xA
    043B 940E0667  CALL	_Write_Control_Register
(0188)  Write_Control_Register(0x0B,0x1f);//ERXNDH,ERXND指针指定接收数据包放在RAM中的结束位置
    043D E12F      LDI	R18,0x1F
    043E E00B      LDI	R16,0xB
    043F 940E0667  CALL	_Write_Control_Register
(0189)  //指定接收缓冲区,起始处接收缓冲区要预留至少7个字节,将接收到的数据包放入0x0800-0x1fff
(0190)  
(0191)  Write_Control_Register(0x04,0x00);//ETXSTL
    0441 2722      CLR	R18
    0442 E004      LDI	R16,4
    0443 940E0667  CALL	_Write_Control_Register
(0192)  Write_Control_Register(0x05,0x00);//ETXSTH  
    0445 2722      CLR	R18
    0446 E005      LDI	R16,5
    0447 940E0667  CALL	_Write_Control_Register
(0193)   
(0194)  enc28j60SetBank(0x01);//通过ECON1先选中当前控制寄存器组是Bank1,因为ERXFCON寄存器在Bank1。
    0449 E001      LDI	R16,1
    044A 940E06F4  CALL	_enc28j60SetBank
(0195)  Write_Control_Register(0x18,0x83);//将ERXFCON设定接收单播,广播的帧,丢掉CRC无效的数据包
    044C E823      LDI	R18,0x83
    044D E108      LDI	R16,0x18
    044E 940E0667  CALL	_Write_Control_Register
(0196)   
(0197)  enc28j60SetBank(0x02);//通过ECON1先选中当前控制寄存器组是Bank2,因为MAC相关寄存器在Bank2。
    0450 E002      LDI	R16,2
    0451 940E06F4  CALL	_enc28j60SetBank
(0198)  Bit_Field_Clear(0x01,0x80);//将MACON2中的MARST位清零，使MAC退出复位状态。
    0453 E820      LDI	R18,0x80
    0454 E001      LDI	R16,1
    0455 940E06DE  CALL	_Bit_Field_Clear
(0199)  Write_Control_Register(0x00,0x0d);
    0457 E02D      LDI	R18,0xD
    0458 2700      CLR	R16
    0459 940E0667  CALL	_Write_Control_Register
(0200)  //对MACON1进行配置,使能接收数据帧,如果是双工模式的话还要将TXPAUS和RXPAUS置1
(0201)  Write_Control_Register(0x02,0x33);//对MACON3进行配置,配置MACON3中的PADCFG、TXCRCEN、FRMLNEN.
    045B E323      LDI	R18,0x33
    045C E002      LDI	R16,2
    045D 940E0667  CALL	_Write_Control_Register
(0202) //大多数应用应使能自动填充(达到至少60字节),并始终追加一个有效的CRC.为了方便起见,许多应用可能还希望将FRMLNEN位置1
(0203) //使能帧长度状态报告.如果应用连接到全双工远程节点,则应将FULDPX置1,否则应保持该位清零。
(0204)  Write_Control_Register(0x06,0x12);//配置非背对背包间间隔寄存器的低字节MAIPGL.大多数应用使用12h编程该寄存器。
    045F E122      LDI	R18,0x12
    0460 E006      LDI	R16,6
    0461 940E0667  CALL	_Write_Control_Register
(0205)  //Write_Control_Register(0x07,0x0c);//如果使用半双工模式，应编程非背对背包间间隔寄存器的高字节MAIPGH.
(0206)  //大多数应用使用0Ch编程该寄存器.
(0207)  Write_Control_Register(0x04,0x15);//配置背对背包间间隔寄存器MABBIPG.
    0463 E125      LDI	R18,0x15
    0464 E004      LDI	R16,4
    0465 940E0667  CALL	_Write_Control_Register
(0208)  //当使用全双工模式时,大多数应用使用15h编程该寄存器,而使用半双工模式时则使用12h进行编程.
(0209)  Write_Control_Register(0x0a,0xf0);//MAMXFLL
    0467 EF20      LDI	R18,0xF0
    0468 E00A      LDI	R16,0xA
    0469 940E0667  CALL	_Write_Control_Register
(0210)  Write_Control_Register(0x0b,0x00);//MAMXFLH
    046B 2722      CLR	R18
    046C E00B      LDI	R16,0xB
    046D 940E0667  CALL	_Write_Control_Register
(0211)  //用允许接收或发送的最大帧长度编程MAMXFL寄存器.网络节点一般被设计为处理不大于1518字节的数据包.这里最大240
(0212)    
(0213)  //如果使用半双工模式，还需编程重发和冲突窗口寄存器MACLCON1 和MACLCON2。
(0214)  //大多数应用不需要更改默认的复位值。在网络线缆特别长的情况下，需要增加MACLCON2的默认值
(0215)  
(0216)  enc28j60SetBank(0x03);//通过ECON1先选中当前控制寄存器组是Bank3,因为MAADR相关寄存器在Bank3.
    046F E003      LDI	R16,3
    0470 940E06F4  CALL	_enc28j60SetBank
(0217)  
(0218)  Write_Control_Register(0x01,MACHead[6]);//MAADR0,将本地MAC地址写入MAADR0:MAADR5寄存器.
    0472 9120006F  LDS	R18,0x6F
    0474 E001      LDI	R16,1
    0475 940E0667  CALL	_Write_Control_Register
(0219)  Write_Control_Register(0x00,MACHead[7]);//MAADR1
    0477 91200070  LDS	R18,0x70
    0479 2700      CLR	R16
    047A 940E0667  CALL	_Write_Control_Register
(0220)  Write_Control_Register(0x03,MACHead[8]);//MAADR2
    047C 91200071  LDS	R18,0x71
    047E E003      LDI	R16,3
    047F 940E0667  CALL	_Write_Control_Register
(0221)  Write_Control_Register(0x02,MACHead[9]);//MAADR3
    0481 91200072  LDS	R18,0x72
    0483 E002      LDI	R16,2
    0484 940E0667  CALL	_Write_Control_Register
(0222)  Write_Control_Register(0x05,MACHead[10]);//MAADR4
    0486 91200073  LDS	R18,0x73
    0488 E005      LDI	R16,5
    0489 940E0667  CALL	_Write_Control_Register
(0223)  Write_Control_Register(0x04,MACHead[11]);//MAADR5
    048B 91200074  LDS	R18,0x74
    048D E004      LDI	R16,4
    048E 940E0667  CALL	_Write_Control_Register
(0224) //接下去对PHY进行初始化//
(0225) Write_PHY_Register(0x00,0x01,0x00);//将PHCON1.PDPXMD置1,工作在全双工模式.
    0490 2422      CLR	R2
    0491 8228      STD	Y+0,R2
    0492 E021      LDI	R18,1
    0493 2700      CLR	R16
    0494 940E0719  CALL	_Write_PHY_Register
(0226) Write_PHY_Register(0x10,0x01,0x00);//将PHCON2.HDLDIS置1,禁止发送数据的自动环回。 
    0496 2422      CLR	R2
    0497 8228      STD	Y+0,R2
    0498 E021      LDI	R18,1
    0499 E100      LDI	R16,0x10
    049A 940E0719  CALL	_Write_PHY_Register
(0227) Write_PHY_Register(0x14,0x04,0x72);//PHLCON寄存器配置LEDA,LEDB;LEDA显示链接状态,LEDB显示发送和接收活动
    049C E782      LDI	R24,0x72
    049D 8388      STD	Y+0,R24
    049E E024      LDI	R18,4
    049F E104      LDI	R16,0x14
    04A0 940E0719  CALL	_Write_PHY_Register
(0228) 
(0229) Bit_Field_Set(0x1e,0x80);//ECON2寄存器中的AUTOINC位置1，写缓冲器命令时自动指向下一个地址
    04A2 E820      LDI	R18,0x80
    04A3 E10E      LDI	R16,0x1E
    04A4 940E06C8  CALL	_Bit_Field_Set
(0230) Bit_Field_Set(0x1B,0xc0);//将EIE.INTIE位和EIE.PKTIE置1允许接收产生中断。
    04A6 EC20      LDI	R18,0xC0
    04A7 E10B      LDI	R16,0x1B
    04A8 940E06C8  CALL	_Bit_Field_Set
(0231) Write_Control_Register(0x1f,0x04);//接收使能
    04AA E024      LDI	R18,4
    04AB E10F      LDI	R16,0x1F
    04AC 940E0667  CALL	_Write_Control_Register
(0232) }
    04AE 9621      ADIW	R28,1
    04AF 940E076B  CALL	pop_gset1
    04B1 9508      RET
_INT1_17:
  i                    --> R16
    04B2 930A      ST	R16,-Y
    04B3 938A      ST	R24,-Y
    04B4 B70F      IN	R16,0x3F
    04B5 930A      ST	R16,-Y
(0233) //##############################中断服务程序##################################//
(0234) void INT1_17(void)//接外部按键
(0235) {uchar i=0;
    04B6 2700      CLR	R16
(0236) GICR &=0xbf;
    04B7 B78B      IN	R24,0x3B
    04B8 7B8F      ANDI	R24,0xBF
    04B9 BF8B      OUT	0x3B,R24
(0237) //Transmit_Packets();//起动发送数据包
(0238) GICR |=0x40;
    04BA B78B      IN	R24,0x3B
    04BB 6480      ORI	R24,0x40
    04BC BF8B      OUT	0x3B,R24
(0239)  }
    04BD 9109      LD	R16,Y+
    04BE BF0F      OUT	0x3F,R16
    04BF 9189      LD	R24,Y+
    04C0 9109      LD	R16,Y+
    04C1 9518      RETI
_INT0_16:
  temp                 --> R20
    04C2 940E078B  CALL	push_lset
    04C4 940E0768  CALL	push_gset1
(0240) void INT0_16(void)
(0241) {uchar temp=0x00;//
    04C6 2744      CLR	R20
(0242)  GICR &=0x7f;
    04C7 B78B      IN	R24,0x3B
    04C8 778F      ANDI	R24,0x7F
    04C9 BF8B      OUT	0x3B,R24
(0243)  temp=Read_Control_Register(ETH,0x1f);//读取ECON1的值,先保护起来
    04CA E12F      LDI	R18,0x1F
    04CB 2700      CLR	R16
    04CC 940E0648  CALL	_Read_Control_Register
    04CE 2F40      MOV	R20,R16
(0244)  
(0245)  do Receive_Packets();
    04CF DECB      RCALL	_Receive_Packets
(0246)  while(EPKTCNT!=0);
    04D0 90200067  LDS	R2,0x67
    04D2 2022      TST	R2
    04D3 F7D9      BNE	0x04CF
(0247)  Write_Control_Register(0x1f,0x00);//关接收使能
    04D4 2722      CLR	R18
    04D5 E10F      LDI	R16,0x1F
    04D6 940E0667  CALL	_Write_Control_Register
(0248)  enc28j60SetBank(0x00);//通过ECON1先选中当前控制寄存器组是Bank0
    04D8 2700      CLR	R16
    04D9 940E06F4  CALL	_enc28j60SetBank
(0249)  Write_Control_Register(0x08,0x00);//ERXSTL
    04DB 2722      CLR	R18
    04DC E008      LDI	R16,0x8
    04DD 940E0667  CALL	_Write_Control_Register
(0250)  Write_Control_Register(0x09,0x08);//ERXSTH,ERXST指针指定接收数据包放在RAM中的开始位置
    04DF E028      LDI	R18,0x8
    04E0 E009      LDI	R16,0x9
    04E1 940E0667  CALL	_Write_Control_Register
(0251)  Write_Control_Register(0x0C,0x00);//ERXRDPTL
    04E3 2722      CLR	R18
    04E4 E00C      LDI	R16,0xC
    04E5 940E0667  CALL	_Write_Control_Register
(0252)  Write_Control_Register(0x0D,0x08);//ERXRDPTH,与ERXST值要保持相同
    04E7 E028      LDI	R18,0x8
    04E8 E00D      LDI	R16,0xD
    04E9 940E0667  CALL	_Write_Control_Register
(0253)  Write_Control_Register(0x00,0x00);//ERDPTL
    04EB 2722      CLR	R18
    04EC 2700      CLR	R16
    04ED 940E0667  CALL	_Write_Control_Register
(0254)  Write_Control_Register(0x01,0x08);//ERDPTH，读数据包指针起始位置
    04EF E028      LDI	R18,0x8
    04F0 E001      LDI	R16,1
    04F1 940E0667  CALL	_Write_Control_Register
(0255)  Write_Control_Register(0x0A,0xff);//ERXNDL
    04F3 EF2F      LDI	R18,0xFF
    04F4 E00A      LDI	R16,0xA
    04F5 940E0667  CALL	_Write_Control_Register
(0256)  Write_Control_Register(0x0B,0x1f);//
    04F7 E12F      LDI	R18,0x1F
    04F8 E00B      LDI	R16,0xB
    04F9 940E0667  CALL	_Write_Control_Register
(0257)  
(0258)  Write_Control_Register(0x1f,0x04);//接收使能
    04FB E024      LDI	R18,4
    04FC E10F      LDI	R16,0x1F
    04FD 940E0667  CALL	_Write_Control_Register
(0259)  
(0260)  Write_Control_Register(0x1f,temp);//恢复ECON1的值
    04FF 2F24      MOV	R18,R20
    0500 E10F      LDI	R16,0x1F
    0501 940E0667  CALL	_Write_Control_Register
(0261)  GICR |=0x80;
    0503 B78B      IN	R24,0x3B
    0504 6880      ORI	R24,0x80
    0505 BF8B      OUT	0x3B,R24
(0262) }
    0506 940E076B  CALL	pop_gset1
    0508 940E07A2  CALL	pop_lset
    050A 9518      RETI
_Usart_receive:
    050B 922A      ST	R2,-Y
    050C 938A      ST	R24,-Y
    050D 939A      ST	R25,-Y
    050E 93EA      ST	R30,-Y
    050F 93FA      ST	R31,-Y
    0510 B62F      IN	R2,0x3F
    0511 922A      ST	R2,-Y
(0263) 
(0264) //####################################
(0265) void Usart_receive(void)//定义接收中断服务程序
(0266) {Rec232[usart_number]=UDR;
    0512 E889      LDI	R24,0x89
    0513 E092      LDI	R25,2
    0514 91E00388  LDS	R30,0x388
    0516 27FF      CLR	R31
    0517 0FE8      ADD	R30,R24
    0518 1FF9      ADC	R31,R25
    0519 B02C      IN	R2,0x0C
    051A 8220      STD	Z+0,R2
(0267)  usart_number++;
    051B 91800388  LDS	R24,0x388
    051D 5F8F      SUBI	R24,0xFF
    051E 93800388  STS	0x388,R24
(0268)  TIMSK=0x01;//打开T1,T0中断屏蔽
    0520 E081      LDI	R24,1
    0521 BF89      OUT	0x39,R24
(0269)  TCCR0=0x05;//设T0分频数为1024
    0522 E085      LDI	R24,5
    0523 BF83      OUT	0x33,R24
(0270)  TCNT0=0xf0;//设T0时间常数,波特率数据流结束所对应的间隔
    0524 EF80      LDI	R24,0xF0
    0525 BF82      OUT	0x32,R24
(0271)  }