dalia.vhd

用VHDL实现DALI数据传输协议,速度快,稳定,方便

			    datain22<="00000000";
				 addr22<=1;
				 null;
			 when "00000001"=> 
          	 state_time_temp:=state_time_temp-"0000000000001";
										
				 if(state_time_temp="0000000000000") then
					 datain22<="00000000";
					 addr22<=1;
					 input_level3<=power_on_level;
					 null;
				 end if;
		    when"00000010"=>   
			    state_time_temp:=state_time_temp-"0000000000001";
				 if(state_time_temp/="0000000000000") then
					 if(fade_start_level>fade_stop_level) then
						 if(fade_stop_level="00000000") then
							 p:=conv_integer(fade_start_level-min_level)*conv_integer(fade_total-state_time_temp);
							 p1:=(conv_std_logic_vector(p,21)-'0'&fade_total&"0000000");
							 if(p1>="000000000000000000000")then
								 dif_level(7):='1';
								 p12:=p1;
								 else 
								 dif_level(7):='0';
								 p12:=conv_std_logic_vector(p,21);
							 end if;
							 p2:=p12-"00"&fade_total&"000000";
							 if(p2>="000000000000000000000")then
								 dif_level(6):='1';
								 p23:=p2;
								 else 
								 dif_level(6):='0';
								 p23:=p12;
							 end if;
							 p3:=p23-"000"&fade_total&"00000";
							 if(p3>="000000000000000000000")then
								 dif_level(5):='1';
								 p34:=p3;
								 else 
								 dif_level(5):='0';
								 p34:=p23;
							 end if;
							 p4:=p34-"0000"&fade_total&"0000";
							 if(p4>="000000000000000000000")then
								 dif_level(4):='1';
								 p45:=p4;
								 else 
								 dif_level(4):='0';
								 p45:=p34;
							 end if;
							 p5:=p45-"00000"&fade_total&"000";
							 if(p5>="000000000000000000000")then
								 dif_level(3):='1';
								 p56:=p5;
								 else 
								 dif_level(3):='0';
								 p56:=p45;
							 end if;
							 p6:=p56-"000000"&fade_total&"00";
							 if(p6>="000000000000000000000")then
								 dif_level(2):='1';
								 p67:=p6;
								 else 
								 dif_level(2):='0';
								 p67:=p56;
							 end if;
							 p7:=p67-"0000000"&fade_total&'0';
							 if(p7>="000000000000000000000")then
							    dif_level(1):='1';
								 p78:=p7;
								 else 
								 dif_level(1):='0';
								 p78:=p67;
							 end if;
							 p8:=p78-"00000000"&fade_total;
							 if(p8>="000000000000000000000")then
							    dif_level(0):='1';
								 p89:=p8;
								 else 
								 dif_level(0):='0';
								 p89:=p78;
							 end if;
							 new_level<=fade_start_level-dif_level;
							 else
							 p:=conv_integer(fade_start_level-fade_stop_level)*conv_integer(fade_total-state_time_temp);
							 p1:=(conv_std_logic_vector(p,21)-'0'&fade_total&"0000000");
							 if(p1>="000000000000000000000")then
								 dif_level(7):='1';
								 p12:=p1;
								 else 
								 dif_level(7):='0';
								 p12:=conv_std_logic_vector(p,21);
							 end if;
							 p2:=p12-"00"&fade_total&"000000";
							 if(p2>="000000000000000000000")then
								 dif_level(6):='1';
								 p23:=p2;
								 else 
								 dif_level(6):='0';
								 p23:=p12;
							 end if;
							 p3:=p23-"000"&fade_total&"00000";
							 if(p3>="000000000000000000000")then
								 dif_level(5):='1';
								 p34:=p3;
								 else 
								 dif_level(5):='0';
								 p34:=p23;
							 end if;
							 p4:=p34-"0000"&fade_total&"0000";
							 if(p4>="000000000000000000000")then
								 dif_level(4):='1';
								 p45:=p4;
								 else 
								 dif_level(4):='0';
								 p45:=p34;
							 end if;
							 p5:=p45-"00000"&fade_total&"000";
							 if(p5>="000000000000000000000")then
								 dif_level(3):='1';
								 p56:=p5;
								 else dif_level(3):='0';
								 p56:=p45;
							 end if;
							 p6:=p56-"000000"&fade_total&"00";
							 if(p6>="000000000000000000000")then
								 dif_level(2):='1';
								 p67:=p6;
								 else 
								 dif_level(2):='0';
								 p67:=p56;
							 end if;
							 p7:=p67-"0000000"&fade_total&'0';
							 if(p7>="000000000000000000000")then
								 dif_level(1):='1';
								 p78:=p7;
								 else 
								 dif_level(1):='0';
								 p78:=p67;
							 end if;
							 p8:=p78-"00000000"&fade_total;
							 if(p8>="000000000000000000000")then
								 dif_level(0):='1';
								 p89:=p8;
								 else 
								 dif_level(0):='0';
								 p89:=p78;
							 end if;
							 new_level<=fade_start_level-dif_level;
						 end if;
						 else
						 p:= conv_integer(fade_stop_level-fade_start_level)*conv_integer(fade_total-state_time_temp);
						 p1:=(conv_std_logic_vector(p,21)-'0'&fade_total&"0000000");
						 if(p1>="000000000000000000000")then
							 dif_level(7):='1';
							 p12:=p1;
							 else 
							 dif_level(7):='0';
							 p12:=conv_std_logic_vector(p,21);
						 end if;
						 p2:=p12-"00"&fade_total&"000000";
						 if(p2>="000000000000000000000")then
							 dif_level(6):='1';
							 p23:=p2;
							 else 
							 dif_level(6):='0';
							 p23:=p12;
						 end if;
						 p3:=p23-"000"&fade_total&"00000";
						 if(p3>="000000000000000000000")then
							 dif_level(5):='1';
							 p34:=p3;
							 else
							 dif_level(5):='0';
							 p34:=p23;
						 end if;
						 p4:=p34-"0000"&fade_total&"0000";
						 if(p4>="000000000000000000000")then
							 dif_level(4):='1';
							 p45:=p4;
							 else 
							 dif_level(4):='0';
							 p45:=p34;
						 end if;
						 p5:=p45-"00000"&fade_total&"000";
						 if(p5>="000000000000000000000")then
							 dif_level(3):='1';
							 p56:=p5;
							 else 
							 dif_level(3):='0';
							 p56:=p45;
						 end if;
						 p6:=p56-"000000"&fade_total&"00";
						 if(p6>="000000000000000000000")then
							 dif_level(2):='1';
							 p67:=p6;
							 else 
							 dif_level(2):='0';
							 p67:=p56;
						 end if;
						 p7:=p67-"0000000"&fade_total&'0';
						 if(p7>="000000000000000000000")then
							 dif_level(1):='1';
							 p78:=p7;
							 else 
							 dif_level(1):='0';
							 p78:=p67;
						 end if;
						 p8:=p78-"00000000"&fade_total;
						 if(p8>="000000000000000000000")then
							 dif_level(0):='1';
							 p89:=p8;
							 else 
							 dif_level(0):='0';
							 p89:=p78;
						 end if;
						 new_level<=fade_start_level+dif_level;
					 end if;
					 else
					 datain22<="00000000";
					 addr22<=1;
					 addr22<=1;
					 if((fade_start_level>fade_stop_level)and(fade_stop_level="00000000")) then
						 new_level<="00000000";
					 end if;
				 end if;
			 when others=>null;
		 end case;
	 end if;
	 end process;
	 
	 
p8: process(clk_dali,dataout1)
	 variable temp_value :std_logic; 
	 begin
	 if(clk_dali 'event and clk_dali='1') then
		 if(dataout1 = "00000010") then
			 if((send_position and "00000011")="00000000") then
				 data_out <=  send_value;
				 case send_position is
					 when "00011000" => send_value <= '0'; 
					 when "00011100" => send_value <= '1';
					 when "01100000" => 
						 send_value <= '1';
					 when "01110000" =>    
					 	 datain13 <="00000000";
						 addr13<=0;
					    send_position<="00000000";
					 when others => null;
				 end case;
				 if((send_position>= "00100000") or (send_position<="01011100")) then
					 temp_value :=answer (conv_integer("00000111"-("01011100" - send_position))/8);
					 if((send_position and "00000100")= "00000000") then
					 	 if(temp_value = '0') then
							 send_value <= '1';
					 		 else send_value <= '0';
						 end if;
						 elsif temp_value = '0' then
							 send_value <= '0';
					 	    else 
							 send_value <= '1';
					 end if;
				 end if;
			 end if;
			 send_position <= send_position + "00000001";
		 end if;
    end if;
	 end process p8;


p9: process(clk_dali,data_in)
	 begin
	 if(data_in='1') then
		 low_counter <= "0000000000000000";
		 else 
		 low_counter <= low_counter + "0000000000000001";
		 if low_counter > "0001001011000000" then
			 low_counter <= "0000000000000000";
			 datain23<="00000000";
			 addr23<=1;
			 input_level4<=physical_min_level;
		 end if;
	 end if;
	 end process p9;
	 
		
p10:process(clk_dali,input_level2,input_level3,input_level4)
    variable in0,in2,in3,in4:std_logic_vector(7 downto 0);
    begin
    if(rising_edge(clk_dali))then
       if(in2/=input_level2)then
	       in0:=input_level2;
		    in2:=input_level2;
	    end if;
	    if (in4/=input_level4)then
	       in0:=input_level4;
		    in4:=input_level4;
	    end if;
	    if (in3/=input_level3)then
	       in0:=input_level3;
		    in3:=input_level3;
	    end if;
    end if;
    input_level<=in0;
    end process p10;


p11:process(clk_dali,dataout11,dataout12,dataout13)
    variable in0,in2,in3,in4:std_logic_vector(7 downto 0);
    begin
    if(rising_edge(clk_dali))then
       if(in2/=dataout11)then
	       in0:=dataout11;
		    in2:=dataout11;
	    end if;
	    if (in3/=dataout12)then
	       in0:=dataout12;
		    in3:=dataout12;
	    end if;
       if (in4/=dataout13)then
	       in0:=dataout13;
		    in4:=dataout13;
	    end if;	
    end if;
    dataout1<=in0;
    end process p11;


p12:process(clk_dali,dataout21,dataout22,dataout23)
    variable in0,in2,in3,in4:std_logic_vector(7 downto 0);
    begin
    if(rising_edge(clk_dali))then
       if(in2/=dataout21)then
	       in0:=dataout21;
		    in2:=dataout21;
	    end if;
	    if (in3/=dataout22)then
	       in0:=dataout22;
		    in3:=dataout22;
	    end if;
       if (in4/=dataout23)then
	       in0:=dataout23;
		    in4:=dataout23;
	    end if;	
    end if;
    dataout2<=in0;
    end process p12;

		
  compo:lamp_setlevel port map(input_level,min_level,max_level,level,limit_error,tsco,tch0,tch1);
  compo11: ram port map(clk_dali,addr11,datain11,dataout11);
  compo12: ram port map(clk_dali,addr12,datain12,dataout12);
  compo13: ram port map(clk_dali,addr13,datain13,dataout13);
  compo21: ram port map(clk_dali,addr21,datain21,dataout21);
  compo22: ram port map(clk_dali,addr22,datain22,dataout22);
  compo23: ram port map(clk_dali,addr23,datain23,dataout23);
end   behavior;