elg.m

来自「通信系统的matlab仿真程序」· M 代码 · 共 1,121 行 · 第 1/5 页

%     Finished composite block ['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator4'].

set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator4']],...
		'hide name',0,...
		'position',[275,20,350,70])

add_block('built-in/Outport',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/early gate']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/early gate']],...
		'hide name',0,...
		'position',[380,85,400,105])


%     Subsystem  ['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5'].

new_system([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5']],'Location',[0,38,784,584])

add_block('built-in/Inport',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/trigger']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/trigger']],...
		'Port','2',...
		'position',[65,95,85,115])

add_block('built-in/Inport',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/data']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/data']],...
		'position',[65,35,85,55])

add_block('built-in/Relational Operator',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/equal']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/equal']],...
		'Operator','==',...
		'position',[140,69,170,91])

add_block('built-in/Outport',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/integrated',13,' output']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/integrated',13,' output']],...
		'position',[435,60,455,80])

add_block('built-in/Unit Delay',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/Unit Delay']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/Unit Delay']],...
		'Sample time','tss',...
		'position',[290,62,340,78])

add_block('built-in/Switch',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/Switch1']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/Switch1']],...
		'Threshold','eps',...
		'position',[240,54,265,86])

add_block('built-in/Inport',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/reset value']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/reset value']],...
		'Port','3',...
		'position',[65,140,85,160])

add_block('built-in/Sum',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/Sum']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5/Sum']],...
		'position',[185,30,205,50])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5']],[90,105;115,105;115,75;135,75])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5']],[270,70;285,70])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5']],[175,80;175,70;235,70])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5']],[345,70;380,70;380,15;160,15;160,35;180,35])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5']],[90,45;180,45])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5']],[210,40;215,40;215,60;235,60])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5']],[90,150;190,150;190,80;235,80])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5']],[270,70;275,70;275,100;395,100;395,70;430,70])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5']],...
		'Mask Display','Discrete\nResettable\nintegrator',...
		'Mask Type','Discrete Resettable integrator')
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5']],...
		'Mask Help','RESETTABLE INTEGRATOR  The resettable integrator is a masked function. This block has same functionality as the built-in RESET INTEGRATOR except that when input 2 is non-zero, the block stops integration.')


%     Finished composite block ['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5'].

set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Descrete',13,' Resettable',13,'integrator5']],...
		'hide name',0,...
		'position',[270,225,345,275])


%     Subsystem  ['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1'].

new_system([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1']],'Location',[139,159,529,329])


%     Subsystem  ['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1'].

new_system([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']],'Location',[282,116,671,290])

add_block('built-in/Outport',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1/out_1']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1/out_1']],...
		'position',[340,25,360,45])

add_block('built-in/Relational Operator',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1/Relational',13,'Operator1']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1/Relational',13,'Operator1']],...
		'position',[200,88,230,112])

add_block('built-in/Relational Operator',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1/Relational',13,'Operator2']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1/Relational',13,'Operator2']],...
		'Operator','>',...
		'position',[265,23,295,47])

add_block('built-in/Constant',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1/one1']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1/one1']],...
		'Value','thld',...
		'position',[30,135,60,155])

add_block('built-in/Memory',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1/Memory1']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1/Memory1']],...
		'position',[125,80,165,110])

add_block('built-in/Inport',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1/in_1']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1/in_1']],...
		'position',[10,15,30,35])

add_block('built-in/Relational Operator',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1/Relational',13,'Operator']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1/Relational',13,'Operator']],...
		'position',[135,18,165,42])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']],[35,25;130,25])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']],[45,25;45,95;120,95])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']],[170,95;195,95])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']],[65,145;100,145;100,35;130,35])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']],[100,145;180,145;180,105;195,105])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']],[170,30;260,30])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']],[235,100;240,100;240,40;260,40])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']],[300,35;335,35])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']],...
		'Mask Display','plot(0,0,100,100,x,y,v,w);Edge det.',...
		'Mask Type','Edge detection')
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']],...
		'Mask Dialogue','Detect the rising edge of the input\nsignal. Output one when the rising\nedge is detected.|Threshold:')
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']],...
		'Mask Translate','thld=@1;[v,w]=trigicon(0,50,get_param(gcb,''orientation''),2);[x,y]=trigicon(1,50,get_param(gcb,''orientation''));')
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']],...
		'Mask Help','This block outputs one when the input signal reaches a value larger than or equal to the given threshold value at the current time and the value was below the threshold one time step before. Otherwise, the block outputs zero.')
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']],...
		'Mask Entries','0.5\/')


%     Finished composite block ['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1'].

set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Rising edge',13,'detector1']],...
		'position',[65,78,145,122])

add_block('built-in/Inport',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/in_1']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/in_1']],...
		'position',[25,30,45,50])

add_block('built-in/Switch',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Switch']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Switch']],...
		'hide name',0,...
		'Threshold','.5',...
		'position',[180,84,210,116])

add_block('built-in/Outport',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/out_1']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/out_1']],...
		'position',[340,90,360,110])

add_block('built-in/Unit Delay',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Unit Delay']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Unit Delay']],...
		'hide name',0,...
		'Sample time','tss',...
		'position',[235,92,285,108])

add_block('built-in/Inport',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/in_2']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/in_2']],...
		'Port','2',...
		'position',[25,90,45,110])

add_block('built-in/Transport Delay',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Transport',13,'Delay']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1/Transport',13,'Delay']],...
		'hide name',0,...
		'Delay Time','tss/2',...
		'position',[80,25,120,55])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1']],[150,100;175,100])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1']],[50,100;60,100])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1']],[215,100;230,100])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1']],[290,100;335,100])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1']],[305,100;305,140;160,140;160,110;175,110])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1']],[50,40;75,40])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1']],[125,40;155,40;155,90;175,90])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1']],...
		'Mask Display','Discrete\nSample\nand Hold',...
		'Mask Type','Discrete Sample and Hold')


%     Finished composite block ['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1'].

set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/Discrete',13,'trighold1']],...
		'hide name',0,...
		'position',[405,233,475,297])

add_block('built-in/Outport',[sys,'/',['Discrete',13,' Early-Late',13,' Gate/late gate']])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate/late gate']],...
		'hide name',0,...
		'Port','2',...
		'position',[540,295,560,315])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[395,250;400,250])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[350,250;360,250])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[355,45;365,45])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[400,45;410,45])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[40,140;60,140;60,30;270,30])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[480,265;485,265])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[395,145;375,145])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[495,145;485,145])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[490,60;495,60])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[535,60;525,140])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[525,265;535,265;525,150])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[185,225;185,305;535,305])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[190,185;190,195])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[190,105;190,45;270,45])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[335,145;195,135])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[195,145;195,155])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[115,145;180,155])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[135,145;135,185;175,195])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[190,95;375,95])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[180,145;180,135])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[60,140;60,235;265,235])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[185,250;265,250])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[350,305;350,280;400,280])
add_line([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],[360,95;360,75;410,75])
set_param([sys,'/',['Discrete',13,' Early-Late',13,' Gate']],...
		'Mask Display','ELG')


%     Finished composite block ['Discrete',13,' Early-Late',13,' Gate'].