📄 drive2.lst
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dspa -l -s -i../include -v2xx -iD:/CCStudio_v3.1/c2400/cgtools/include -g drive2.asm ../obj\drive2.obj
TMS320C24xx COFF Assembler Version 7.04 Fri May 04 19:50:25 2007
Copyright (c) 1987-2003 Texas Instruments Incorporated
drive2.asm PAGE 1
1 ;===============================================================================================================
2 ; File name: DRIVE2.ASM
3 ;
4 ; Originator: Digital Control Systems Group
5 ; Texas Instruments
6 ; Description:
7 ; This file contains source for the implementing the gate enable and
8 ; disable of PWM signals on DMC1500 inverter.
9 ;=====================================================================================
10 ; History:
11 ;-------------------------------------------------------------------------------------
12 ; 04-09-2001 Release Rev 1.00
13 ;================================================================================
14 ; Applicability: F240x/F243. (Peripheral dependant).
15 ;
16 ;================================================================================
17 ; Routine Name: F24xx_drive_drv_calc Routine Type: C Callable
18 ;
19 ; Description:
20 ;
21 ; C prototype : int F24xx_drive_drv_calc(DRIVE *p)
22 ;================================================================================
23
24 ; Definition of the DRIVE structure is as follows:
25 ;
26 ;typedef struct { int enable_flg; /* Input: Enable drive flag: 1=enable, 0=disable */
27 ; int (*init)(); /* Pointer to the init function */
28 ; int (*calc)(); /* Pointer to the calc function */
29 ; } DRIVE;
30 ;
31 ;================================================================================
32 .include ..\include\x240x.h
33 ;================================================================================
34 .def _F24xx_drive_drv_calc
35 ;================================================================================
36 0001 __F24xx_drive_drv_calc_framesize .set 0001h
37 ;================================================================================
38 0000 _F24xx_drive_drv_calc:
39
40 0000 8aa0 POPD *+ ; Keep return add
41 0001 80a0 SAR AR0,*+ ; Keep old frame pointer
42 0002 8180 SAR AR1,* ; Keep old stack pointer
43 0003 b001 LARK AR0,__F24xx_drive_drv_calc_framesize ; Load AR0 with frame size
44 0004 00e8 LAR AR0,*0+,AR0 ; AR0->FP0 (new FP), ARP=
45
46 ;================================================================================
47 0005 7c03 SBRK #3 ; ARP=AR0, AR0->FR0-3 (1st argument)
48 ;--------------------------------------------------------------------------------
49 0006 0280 LAR AR2,* ; ARP=AR0, AR0->enable_flg, AR2->enable_flg
50 ;--------------------------------------------------------------------------------
51 0007 7803 ADRK #3 ; ARP=AR0, AR0->FR0, AR2->enable_flg
52 ;--------------------------------------------------------------------------------
53 0008 8b8a MAR *,AR2 ; ARP=AR2, AR0->FR0, AR2->enable_flg
54 ;----------------------------------------------------------------------------------
TMS320C24xx COFF Assembler Version 7.04 Fri May 04 19:50:25 2007
Copyright (c) 1987-2003 Texas Instruments Incorporated
drive2.asm PAGE 2
55 0009 be47 SETC SXM ; Turn sign extension mode on
56 ; ARP=AR2, AR0->FR0, AR2->enable_flg
57 ;--------------------------------------------------------------------------------
58 000a 108b LACC *,AR3 ; ACC = enable_flg
59 ; ARP=AR2, AR0->FR0, AR2->enable_flg, ARP=AR3
60 ;--------------------------------------------------------------------------------
61 000b e308 BCND ENABLE_DRIVE,NEQ ; Branch to ENABLE_DRIVE if enable_flg != 0
000c 0015'
62 ; ARP=AR3, AR0->FR0, AR2->enable_flg
63 ;--------------------------------------------------------------------------------
64 000d DISABLE_DRIVE ; ARP=AR3, AR0->FR0, AR2->enable_flg
65 ;--------------------------------------------------------------------------------
66 000d bf0b LAR AR3,#PBDATDIR ; Point AR3 to PBDATDIR
000e 709a
67 ; ARP=AR3, AR0->FR0, AR2->enable_flg, AR3->PBDATDIR
68 ;--------------------------------------------------------------------------------
69 000f 1080 LACC * ; ACC = (PBDATDIR)
70 ; ARP=AR3, AR0->FR0, AR2->enable_flg, AR3->PBDAT
71 ;--------------------------------------------------------------------------------
72 0010 bfc0 OR #05050h ; ACC = (PBDATDIR) | 05050h
0011 5050
73 ; ARP=AR3, AR0->FR0, AR2->enable_flg, AR3->PBDAT
74 ;--------------------------------------------------------------------------------
75 0012 9089 SACL *,AR1 ; PBDATDIR = PBDATDIR | 05050h
76 ; ARP=AR3, AR0->FR0, AR2->enable_flg, AR3->PBDATDIR, ARP=AR1
77 ;--------------------------------------------------------------------------------
78 0013 7980 B DRIVE_END ; ARP=AR1, AR0->FR0, AR2->enable_flg, AR3->PBDATDIR
0014 0021'
79 ;--------------------------------------------------------------------------------
80 0015 ENABLE_DRIVE ; ARP=AR3, AR0->FR0, AR2->enable_flg
81 ;--------------------------------------------------------------------------------
82 0015 bf0b LAR AR3,#PBDATDIR ; Point AR3 to PBDATDIR
0016 709a
83 ; ARP=AR3, AR0->FR0, AR2->enable_flg, AR3->PBDATDIR
84 ;--------------------------------------------------------------------------------
85 0017 1080 LACC * ; ACC = (PBDATDIR)
86 ; ARP=AR3, AR0->FR0, AR2->enable_flg, AR3->PBDAT
87 ;--------------------------------------------------------------------------------
88 0018 bfb0 AND #0FFEFh ; ACC = (PBDATDIR) & 0FFEFh (IOPB4 low)
0019 ffef
89 ; ARP=AR3, AR0->FR0, AR2->enable_flg, AR3->PBDAT
90 ;--------------------------------------------------------------------------------
91 001a 9080 SACL * ; PBDATDIR = PBDATDIR & 0FFEFh (IOPB4 low)
92 ; ARP=AR3, AR0->FR0, AR2->enable_flg, AR3->PBDATDIR
93 ;--------------------------------------------------------------------------------
94 001b bfc0 OR #00010h ; ACC = (PBDATDIR) | 0010h (IOPB4 high)
001c 0010
95 ; ARP=AR3, AR0->FR0, AR2->enable_flg, AR3->PBDAT
96 ;--------------------------------------------------------------------------------
97 001d 9080 SACL * ; PBDATDIR = PBDATDIR | 0010h (IOPB4 high)
98 ; ARP=AR3, AR0->FR0, AR2->enable_flg, AR3->PBDATDIR
99 ;--------------------------------------------------------------------------------
100 001e bfb0 AND #0FFBFh ; ACC = (PBDATDIR) & 0FFBFh (IOPB6 low)
001f ffbf
TMS320C24xx COFF Assembler Version 7.04 Fri May 04 19:50:25 2007
Copyright (c) 1987-2003 Texas Instruments Incorporated
drive2.asm PAGE 3
101 ; ARP=AR3, AR0->FR0, AR2->enable_flg, AR3->PBDAT
102 ;--------------------------------------------------------------------------------
103 0020 9089 SACL *,AR1 ; PBDATDIR = PBDATDIR & 0FFBFh (IOPB6 low)
104 ; ARP=AR3, AR0->FR0, AR2->enable_flg, AR3->PBDATDIR, ARP=AR1
105 ;--------------------------------------------------------------------------------
106 0021 DRIVE_END ; ARP=AR1, AR0->FR0, AR2->enable_flg, AR3->PBDATDIR
107 ;--------------------------------------------------------------------------------
108 0021 _F24xx_drive_drv_calc_end:
109
110 ;;MAR *,AR1 ; can be removed if this condition is met on
111 ;; ; every path to this code. (i.e., ARP=AR1 here)
112
113 0021 7c02 SBRK #(__F24xx_drive_drv_calc_framesize+1)
114 0022 0090 LAR AR0,*-
115 0023 7680 PSHD *
116
117 0024 ef00 RET
118
119
120
121
122
No Errors, No Warnings
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