📄 rampgen.lst
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88 ;----------------------------------------------------------------------------------
89 0013 1088 LACC *,AR0 ; ACC = angle_rg (Q0)
90 ; ARP=AR2, AR0->FR0, AR2->angle_rg, ARP=AR0
91 ;----------------------------------------------------------------------------------
92 0014 208a ADD *,AR2 ; ACC = angle_rg + step_angle_rg (Q0)
93 ; ARP=AR0, AR0->FR0, AR2->angle_rg, ARP=AR2
94 ;----------------------------------------------------------------------------------
95 0015 9080 SACL * ; angle_rg = angle_rg + step_angle_rg (Q0)
96 ; ARP=AR2, AR0->FR0, AR2->angle_rg
97 ;----------------------------------------------------------------------------------
98 0016 73a0 LT *+ ; TREG = angle_rg (Q0)
99 ; ARP=AR2, AR0->FR0, AR2->rmp_gain
100 ;----------------------------------------------------------------------------------
101 0017 54a8 MPY *+,AR0 ; PREG = angle_rg*rmp_gain (Q15)
102 ; ARP=AR2, AR0->FR0, AR2->rmp_out, ARP=AR0
103 ;----------------------------------------------------------------------------------
104 0018 be03 PAC ; ACC = angle_rg*rmp_gain (Q15)
105 ; ARP=AR0, AR0->FR0, AR2->rmp_out
106 ;----------------------------------------------------------------------------------
107 0019 9980 SACH *,1 ; FR0 = rmp_out_abs = angle_rg*rmp_gain (Q0)
108 ; ARP=AR0, AR0->FR0, AR2->rmp_out
TMS320C24xx COFF Assembler Version 7.04 Fri May 04 19:50:40 2007
Copyright (c) 1987-2003 Texas Instruments Incorporated
rampgen.asm PAGE 3
109 ;----------------------------------------------------------------------------------
110 001a 108a LACC *,AR2 ; ACC = rmp_out_abs (Q0)
111 ; ARP=AR0, AR0->FR0, AR2->rmp_out, ARP=AR2
112 ;----------------------------------------------------------------------------------
113 001b 9080 SACL * ; rmp_out = rmp_out_abs (Q15)**
114 ; ARP=AR2, AR0->FR0, AR2->rmp_out
115 ;----------------------------------------------------------------------------------
116 ;**
117 ;In the last two instructions the variables rmp_out_abs and rmp_out contain
118 ;the same value which is the result of the preceeding multiply operation.
119 ;Although they have the same value, by representing rmp_out with a
120 ;different Q format(Q15) than rmp_out_abs(Q0), we have essentially performed
121 ;an implicit normalization(division) operation. The normalized ramp output,
122 ;rmp_out(in Q15), and the absolute ramp output, rmp_out_abs (in Q0), are
123 ;related by,
124 ;rmp_out = rmp_out_abs/7FFFh.
125 ;The output of this module(rmp_out) is normalized (expressed in Q15) since
126 ;in many other s/w modules, where this is used as input, require the input
127 ;be provided in Q15 format.
128 ;----------------------------------------------------------------------------------
129 001c 7c04 SBRK #4 ; ARP=AR2, AR0->FR0, AR2->rmp_freq
130 ;----------------------------------------------------------------------------------
131 001d 1080 LACC * ; ACC = rmp_freq (Q15)
132 ; ARP=AR2, AR0->FR0, AR2->rmp_freq
133 ;----------------------------------------------------------------------------------
134 001e 7804 ADRK #4 ; ARP=AR2, AR0->FR0, AR2->rmp_out
135 ;----------------------------------------------------------------------------------
136 001f e304 BCND RMP_FREQ_POS, GT ; Branch to RMP_FREQ_POS if rmp_freq > 0
0020 0024'
137 ; ARP=AR2, AR0->FR0, AR2->rmp_out
138 ;----------------------------------------------------------------------------------
139 0021 6a80 LACC *,16 ; ACC = rmp_out (Q15)
140 ; ARP=AR2, AR0->FR0, AR2->rmp_out
141 ;----------------------------------------------------------------------------------
142 0022 be02 NEG ; ACC = -rmp_out (Q15)
143 ; ARP=AR2, AR0->FR0, AR2->rmp_out
144 ;----------------------------------------------------------------------------------
145 0023 9880 SACH * ; rmp_out = -rmp_out (Q15)
146 ; 2, AR0->FR0, AR2->rmp_out
147 ;----------------------------------------------------------------------------------
148 0024 RMP_FREQ_POS ; ARP=AR2, AR0->FR0, AR2->rmp_out
149 ;----------------------------------------------------------------------------------
150 0024 10a0 LACC *+ ; ACC = rmp_out (Q15)
151 ; ARP=AR2, AR0->FR0, AR2->rmp_offset
152 ;----------------------------------------------------------------------------------
153 0025 2090 ADD *- ; ACC = rmp_out + rmp_offset (Q15)
154 ; ARP=AR2, AR0->FR0, AR2->rmp_out
155 ;----------------------------------------------------------------------------------
156 0026 9089 SACL *,AR1 ; rmp_out = rmp_out + rmp_offset (Q15)
157 ; ARP=AR2, AR0->FR0, AR2->rmp_out, ARP=AR1
158 ;----------------------------------------------------------------------------------
159 0027 _rampgen_calc_exit:
160 ;MAR *,AR1 ; can be removed if this condition is met on
161 ; ; every path to this code. (i.e., ARP=AR1 here)
TMS320C24xx COFF Assembler Version 7.04 Fri May 04 19:50:40 2007
Copyright (c) 1987-2003 Texas Instruments Incorporated
rampgen.asm PAGE 4
162
163 0027 be42 CLRC OVM
164 0028 be46 CLRC SXM
165
166 0029 7c02 SBRK #(__rampgen_calc_framesize+1)
167 002a 0090 LAR AR0,*-
168 002b 7680 PSHD *
169 002c ef00 RET
170
171
No Errors, No Warnings
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