ieee80211a_lib.mdl

simulink802.11a_R13SP1是关于802标准的有关仿真练习的一些资料,仅供参考,共同学习.

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  Name			  "IEEE80211a_lib"
  Version		  5.0
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  ShowLoopsOnError	  on
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  CovSaveName		  "covdata"
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  ToolBar		  on
  StatusBar		  on
  BrowserShowLibraryLinks on
  BrowserLookUnderMasks	  on
  Created		  "Fri Feb 14 18:23:31 2003"
  Creator		  "y"
  UpdateHistory		  "UpdateHistoryNever"
  ModifiedByFormat	  "%<Auto>"
  LastModifiedBy	  "Owner"
  ModifiedDateFormat	  "%<Auto>"
  LastModifiedDate	  "Sat Feb 22 19:39:24 2003"
  ModelVersionFormat	  "1.%<AutoIncrement:26>"
  ConfigurationManager	  "None"
  SimParamPage		  "Solver"
  LinearizationMsg	  "none"
  Profile		  off
  ParamWorkspaceSource	  "MATLABWorkspace"
  ExtModeMexFile	  "ext_comm"
  ExtModeBatchMode	  off
  ExtModeTrigType	  "manual"
  ExtModeTrigMode	  "normal"
  ExtModeTrigPort	  "1"
  ExtModeTrigElement	  "any"
  ExtModeTrigDuration	  1000
  ExtModeTrigHoldOff	  0
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  ExtModeTrigDirection	  "rising"
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  ExtModeArmWhenConnect	  on
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  ExtModeLogAll		  on
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  SimulationMode	  "normal"
  ConsistencyChecking	  "none"
  ArrayBoundsChecking	  "none"
  AlgebraicLoopMsg	  "warning"
  BlockPriorityViolationMsg "warning"
  MinStepSizeMsg	  "warning"
  InheritedTsInSrcMsg	  "warning"
  DiscreteInheritContinuousMsg "warning"
  MultiTaskRateTransMsg	  "error"
  SingleTaskRateTransMsg  "none"
  CheckForMatrixSingularity "none"
  IntegerOverflowMsg	  "warning"
  Int32ToFloatConvMsg	  "warning"
  ParameterDowncastMsg	  "error"
  ParameterOverflowMsg	  "error"
  ParameterPrecisionLossMsg "warning"
  UnderSpecifiedDataTypeMsg "none"
  UnnecessaryDatatypeConvMsg "none"
  VectorMatrixConversionMsg "none"
  InvalidFcnCallConnMsg	  "error"
  SignalLabelMismatchMsg  "none"
  UnconnectedInputMsg	  "warning"
  UnconnectedOutputMsg	  "warning"
  UnconnectedLineMsg	  "warning"
  SfunCompatibilityCheckMsg "none"
  ProdHWDeviceType	  "Microprocessor"
  ProdHWWordLengths	  "8,16,32,32"
  RTWMakeCommand	  "make_rtw"
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      OutDataType	      "sfix(16)"
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      Interpolate	      on
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      OutputWhenDisabled      "held"
      InitialOutput	      "[]"
    }
    Block {
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    Block {
      BlockType		      SubSystem
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    Block {
      BlockType		      Sum
      IconShape		      "rectangular"
      Inputs		      "++"
      ShowAdditionalParam     off
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      LockScale		      off
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
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  }
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    HorizontalAlignment	    "center"
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    DropShadow		    off
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  System {
    Name		    "IEEE80211a_lib"
    Location		    [151, 84, 515, 321]
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      MaskType		      "QAM Demodulator-Decoder."
      MaskDescription	      "Demodulator has option to zero-pad output, so t"
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      MaskPromptString	      "Number of symbols per frame:|Modulation:|Code:|"
"Trellis:|Puncture vector:|Viterbi trace back depth:"
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      MaskVariables	      "numSymbols=@1;modulation=&2;code=&3;trellisStru"
"cture=@4;punctureVector=@5;vtbd=@6;"
      MaskInitialization      "% number of bits per symbol\nswitch modulation"
"\n	case 'BPSK', Nb1 = 1;\n	case 'QPSK', Nb1 = 2;\n	case "
"'16-QAM', Nb1 = 4;\n	case '64-QAM', Nb1 = 6;\nend\n\nmodOrder = 2.^Nb1"
";\nNb = numSymbols * Nb1; % tx bits per block\ncodeRate = str2num(strvcat(cod"
"e)).';\nbitsPerBlock = Nb .* codeRate;\n\n% interleaver\ninterleaverRows = 16"
";\nif rem(Nb, interleaverRows)\n	error('Number of transmitted bits per"
" block must be multiple of 16.')\nend\ninterleaverCols = Nb / interleaverRows"
";\ninterleaverElements = [...\n            2*floor( [0:Nb-1]/2 ) + ...\n     "
"       mod( ([0:Nb-1] + Nb - floor( interleaverRows*[0:Nb-1]/Nb ) ), 2 ) ..."
"\n            + 1]';"
      MaskDisplay	      "disp(['Demodulator\\n' modulation ' ' code])\np"
"ort_label('input', 1, ' ')\nport_label('output', 1, ' ')\nport_label('output'"
", 2, 'err')"
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      MaskIconUnits	      "autoscale"
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"0 0 1].'|34"
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	  Name			  "rxsig"
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	  Name			  "Enable"
	  Ports			  []
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	  BlockType		  Reference
	  Name			  "General Block\nDeinterleaver"
	  Ports			  [1, 1]
	  Position		  [320, 60, 395, 110]
	  ShowName		  off
	  SourceBlock		  "commblkintrlv2/General Block\nDeinterleaver"
	  SourceType		  "General Block Deinterleaver"
	  elements		  "interleaverElements"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Insert Zero4"
	  Ports			  [1, 1]
	  Position		  [545, 70, 600, 100]
	  ShowName		  off
	  SourceBlock		  "commsequence2/Insert Zero"
	  SourceType		  "Insert Zero"
	  insertZeroVector	  "punctureVector"
	}
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	  BlockType		  Reference
	  Name			  "Matrix\nDeinterleaver"
	  Ports			  [1, 1]
	  Position		  [435, 65, 510, 105]
	  NamePlacement		  "alternate"
	  ShowName		  off
	  SourceBlock		  "commblkintrlv2/Matrix\nDeinterleaver"
	  SourceType		  "Matrix Deinterleaver"
	  Nrows			  "interleaverRows"
	  Ncols			  "interleaverCols"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Rectangular QAM\nDemodulator\nBaseband"
	  Ports			  [1, 1]
	  Position		  [105, 62, 180, 108]
	  ShowName		  off
	  SourceBlock		  "commdigbbndam2/Rectangular QAM\nDemodulator"
"\nBaseband"
	  SourceType		  "Rectangular QAM Demodulator Baseband"
	  M			  "modOrder"
	  OutType		  "Bit"
	  Dec			  "Gray"
	  PowType		  "Average Power"
	  MinDist		  "2"
	  AvgPow		  "1"
	  PeakPow		  "1"
	  Ph			  "0"
	  numSamp		  "1"
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	  ShowName		  off
	  SourceBlock		  "commdigbbndam2/Rectangular QAM\nModulator\n"
"Baseband"
	  SourceType		  "Rectangular QAM Modulator Baseband"
	  M			  "modOrder"
	  InType		  "Bit"
	  Enc			  "Gray"
	  PowType		  "Average Power"
	  MinDist		  "2"
	  AvgPow		  "1"
	  PeakPow		  "1"
	  Ph			  "0"
	  numSamp		  "1"
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	  IconShape		  "round"
	  Inputs		  "|+-"
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	  OutDataTypeMode	  "Inherit via internal rule"
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	  SourceBlock		  "commutil2/Unipolar to\nBipolar\nConverter"
	  SourceType		  "Unipolar to Bipolar Converter"
	  M			  "2"
	  polarity		  "Negative"
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	Block {
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	  Name			  "Viterbi Decoder1"
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	  Position		  [635, 66, 715, 104]
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	  SourceBlock		  "commcnvcod2/Viterbi Decoder"
	  SourceType		  "Viterbi Decoder"
	  trellis		  "trellisStructure"
	  dectype		  "Unquantized"
	  nsdecb		  "4"
	  tbdepth		  "vtbd"
	  opmode		  "Continuous"
	  reset			  "off"
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