key.tan.qmsg

这是一个凌阳单片机控制的红外键盘的控制程序

{ "Info" "ITDB_TSU_RESULT" "ChangeEdge:a\|Pulse KeyPulse CLK 4.756 ns register " "Info: tsu for register \"ChangeEdge:a\|Pulse\" (data pin = \"KeyPulse\", clock pin = \"CLK\") is 4.756 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.500 ns + Longest pin register " "Info: + Longest pin to register delay is 7.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.475 ns) 1.475 ns KeyPulse 1 PIN PIN_57 2 " "Info: 1: + IC(0.000 ns) + CELL(1.475 ns) = 1.475 ns; Loc. = PIN_57; Fanout = 2; PIN Node = 'KeyPulse'" {  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "" { KeyPulse } "NODE_NAME" } "" } } { "KEY.v" "" { Text "E:/KEY/KEY.v" 2 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(5.547 ns) + CELL(0.478 ns) 7.500 ns ChangeEdge:a\|Pulse 2 REG LC_X17_Y8_N7 22 " "Info: 2: + IC(5.547 ns) + CELL(0.478 ns) = 7.500 ns; Loc. = LC_X17_Y8_N7; Fanout = 22; REG Node = 'ChangeEdge:a\|Pulse'" {  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "6.025 ns" { KeyPulse ChangeEdge:a|Pulse } "NODE_NAME" } "" } } { "ChangeEdge.v" "" { Text "E:/KEY/ChangeEdge.v" 4 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.953 ns 26.04 % " "Info: Total cell delay = 1.953 ns ( 26.04 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.547 ns 73.96 % " "Info: Total interconnect delay = 5.547 ns ( 73.96 % )" {  } {  } 0}  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "7.500 ns" { KeyPulse ChangeEdge:a|Pulse } "NODE_NAME" } "" } } { "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "7.500 ns" { KeyPulse KeyPulse~out0 ChangeEdge:a|Pulse } { 0.000ns 0.000ns 5.547ns } { 0.000ns 1.475ns 0.478ns } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "ChangeEdge.v" "" { Text "E:/KEY/ChangeEdge.v" 4 -1 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 2.781 ns - Shortest register " "Info: - Shortest clock path from clock \"CLK\" to destination register is 2.781 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK 1 CLK PIN_17 112 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_17; Fanout = 112; CLK Node = 'CLK'" {  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "" { CLK } "NODE_NAME" } "" } } { "KEY.v" "" { Text "E:/KEY/KEY.v" 3 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.711 ns) 2.781 ns ChangeEdge:a\|Pulse 2 REG LC_X17_Y8_N7 22 " "Info: 2: + IC(0.601 ns) + CELL(0.711 ns) = 2.781 ns; Loc. = LC_X17_Y8_N7; Fanout = 22; REG Node = 'ChangeEdge:a\|Pulse'" {  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "1.312 ns" { CLK ChangeEdge:a|Pulse } "NODE_NAME" } "" } } { "ChangeEdge.v" "" { Text "E:/KEY/ChangeEdge.v" 4 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 78.39 % " "Info: Total cell delay = 2.180 ns ( 78.39 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.601 ns 21.61 % " "Info: Total interconnect delay = 0.601 ns ( 21.61 % )" {  } {  } 0}  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "2.781 ns" { CLK ChangeEdge:a|Pulse } "NODE_NAME" } "" } } { "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { CLK CLK~out0 ChangeEdge:a|Pulse } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "7.500 ns" { KeyPulse ChangeEdge:a|Pulse } "NODE_NAME" } "" } } { "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "7.500 ns" { KeyPulse KeyPulse~out0 ChangeEdge:a|Pulse } { 0.000ns 0.000ns 5.547ns } { 0.000ns 1.475ns 0.478ns } } } { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "2.781 ns" { CLK ChangeEdge:a|Pulse } "NODE_NAME" } "" } } { "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { CLK CLK~out0 ChangeEdge:a|Pulse } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "CLK KeyCode\[26\] KeyCode\[26\]~reg0 7.811 ns register " "Info: tco from clock \"CLK\" to destination pin \"KeyCode\[26\]\" through register \"KeyCode\[26\]~reg0\" is 7.811 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 2.781 ns + Longest register " "Info: + Longest clock path from clock \"CLK\" to source register is 2.781 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK 1 CLK PIN_17 112 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_17; Fanout = 112; CLK Node = 'CLK'" {  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "" { CLK } "NODE_NAME" } "" } } { "KEY.v" "" { Text "E:/KEY/KEY.v" 3 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.711 ns) 2.781 ns KeyCode\[26\]~reg0 2 REG LC_X17_Y10_N5 1 " "Info: 2: + IC(0.601 ns) + CELL(0.711 ns) = 2.781 ns; Loc. = LC_X17_Y10_N5; Fanout = 1; REG Node = 'KeyCode\[26\]~reg0'" {  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "1.312 ns" { CLK KeyCode[26]~reg0 } "NODE_NAME" } "" } } { "KEY.v" "" { Text "E:/KEY/KEY.v" 69 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 78.39 % " "Info: Total cell delay = 2.180 ns ( 78.39 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.601 ns 21.61 % " "Info: Total interconnect delay = 0.601 ns ( 21.61 % )" {  } {  } 0}  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "2.781 ns" { CLK KeyCode[26]~reg0 } "NODE_NAME" } "" } } { "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { CLK CLK~out0 KeyCode[26]~reg0 } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "KEY.v" "" { Text "E:/KEY/KEY.v" 69 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.806 ns + Longest register pin " "Info: + Longest register to pin delay is 4.806 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns KeyCode\[26\]~reg0 1 REG LC_X17_Y10_N5 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X17_Y10_N5; Fanout = 1; REG Node = 'KeyCode\[26\]~reg0'" {  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "" { KeyCode[26]~reg0 } "NODE_NAME" } "" } } { "KEY.v" "" { Text "E:/KEY/KEY.v" 69 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.698 ns) + CELL(2.108 ns) 4.806 ns KeyCode\[26\] 2 PIN PIN_56 0 " "Info: 2: + IC(2.698 ns) + CELL(2.108 ns) = 4.806 ns; Loc. = PIN_56; Fanout = 0; PIN Node = 'KeyCode\[26\]'" {  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "4.806 ns" { KeyCode[26]~reg0 KeyCode[26] } "NODE_NAME" } "" } } { "KEY.v" "" { Text "E:/KEY/KEY.v" 4 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.108 ns 43.86 % " "Info: Total cell delay = 2.108 ns ( 43.86 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.698 ns 56.14 % " "Info: Total interconnect delay = 2.698 ns ( 56.14 % )" {  } {  } 0}  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "4.806 ns" { KeyCode[26]~reg0 KeyCode[26] } "NODE_NAME" } "" } } { "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "4.806 ns" { KeyCode[26]~reg0 KeyCode[26] } { 0.000ns 2.698ns } { 0.000ns 2.108ns } } }  } 0}  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "2.781 ns" { CLK KeyCode[26]~reg0 } "NODE_NAME" } "" } } { "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { CLK CLK~out0 KeyCode[26]~reg0 } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "4.806 ns" { KeyCode[26]~reg0 KeyCode[26] } "NODE_NAME" } "" } } { "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "4.806 ns" { KeyCode[26]~reg0 KeyCode[26] } { 0.000ns 2.698ns } { 0.000ns 2.108ns } } }  } 0}
{ "Info" "ITDB_TH_RESULT" "ChangeEdge:a\|Sign KeyPulse CLK -4.703 ns register " "Info: th for register \"ChangeEdge:a\|Sign\" (data pin = \"KeyPulse\", clock pin = \"CLK\") is -4.703 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 2.781 ns + Longest register " "Info: + Longest clock path from clock \"CLK\" to destination register is 2.781 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK 1 CLK PIN_17 112 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_17; Fanout = 112; CLK Node = 'CLK'" {  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "" { CLK } "NODE_NAME" } "" } } { "KEY.v" "" { Text "E:/KEY/KEY.v" 3 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.711 ns) 2.781 ns ChangeEdge:a\|Sign 2 REG LC_X17_Y8_N3 1 " "Info: 2: + IC(0.601 ns) + CELL(0.711 ns) = 2.781 ns; Loc. = LC_X17_Y8_N3; Fanout = 1; REG Node = 'ChangeEdge:a\|Sign'" {  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "1.312 ns" { CLK ChangeEdge:a|Sign } "NODE_NAME" } "" } } { "ChangeEdge.v" "" { Text "E:/KEY/ChangeEdge.v" 7 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 78.39 % " "Info: Total cell delay = 2.180 ns ( 78.39 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.601 ns 21.61 % " "Info: Total interconnect delay = 0.601 ns ( 21.61 % )" {  } {  } 0}  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "2.781 ns" { CLK ChangeEdge:a|Sign } "NODE_NAME" } "" } } { "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { CLK CLK~out0 ChangeEdge:a|Sign } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TH_DELAY" "0.015 ns + " "Info: + Micro hold delay of destination is 0.015 ns" {  } { { "ChangeEdge.v" "" { Text "E:/KEY/ChangeEdge.v" 7 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.499 ns - Shortest pin register " "Info: - Shortest pin to register delay is 7.499 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.475 ns) 1.475 ns KeyPulse 1 PIN PIN_57 2 " "Info: 1: + IC(0.000 ns) + CELL(1.475 ns) = 1.475 ns; Loc. = PIN_57; Fanout = 2; PIN Node = 'KeyPulse'" {  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "" { KeyPulse } "NODE_NAME" } "" } } { "KEY.v" "" { Text "E:/KEY/KEY.v" 2 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(5.546 ns) + CELL(0.478 ns) 7.499 ns ChangeEdge:a\|Sign 2 REG LC_X17_Y8_N3 1 " "Info: 2: + IC(5.546 ns) + CELL(0.478 ns) = 7.499 ns; Loc. = LC_X17_Y8_N3; Fanout = 1; REG Node = 'ChangeEdge:a\|Sign'" {  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "6.024 ns" { KeyPulse ChangeEdge:a|Sign } "NODE_NAME" } "" } } { "ChangeEdge.v" "" { Text "E:/KEY/ChangeEdge.v" 7 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.953 ns 26.04 % " "Info: Total cell delay = 1.953 ns ( 26.04 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.546 ns 73.96 % " "Info: Total interconnect delay = 5.546 ns ( 73.96 % )" {  } {  } 0}  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "7.499 ns" { KeyPulse ChangeEdge:a|Sign } "NODE_NAME" } "" } } { "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "7.499 ns" { KeyPulse KeyPulse~out0 ChangeEdge:a|Sign } { 0.000ns 0.000ns 5.546ns } { 0.000ns 1.475ns 0.478ns } } }  } 0}  } { { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "2.781 ns" { CLK ChangeEdge:a|Sign } "NODE_NAME" } "" } } { "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { CLK CLK~out0 ChangeEdge:a|Sign } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } { "E:/KEY/db/KEY_cmp.qrpt" "" { Report "E:/KEY/db/KEY_cmp.qrpt" Compiler "KEY" "UNKNOWN" "V1" "E:/KEY/db/KEY.quartus_db" { Floorplan "E:/KEY/" "" "7.499 ns" { KeyPulse ChangeEdge:a|Sign } "NODE_NAME" } "" } } { "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/program files/quartus/quartus50/bin/Technology_Viewer.qrui" "7.499 ns" { KeyPulse KeyPulse~out0 ChangeEdge:a|Sign } { 0.000ns 0.000ns 5.546ns } { 0.000ns 1.475ns 0.478ns } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1  Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Tue Sep 05 21:31:13 2006 " "Info: Processing ended: Tue Sep 05 21:31:13 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0}  } {  } 0}