📄 dmxout.asm
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; user 79164
; the b=25000hz
; system clk =24m
; smod=1
;value define 521--529 551--559
$ NOMOD51
$ INCLUDE (D:\asm\reg52.INC)
status2 equ 20h
runbf bit 20h.0
dmxframefalgs bit 20h.1
dmxresetfalgs bit 20h.2
ledrunfalgs bit 20h.3
rxdsbuf equ 30h ; uart sbuff
dmxdataposition_low equ 31h ; dmx data address low;
dmxdataposition_high equ 32h ;dmx data address high;
temp equ 33h
linkcount equ 34h
ledcount equ 35h
dmxtimer1 equ 36h
dmxdatareg equ 37h
addvar_low equ 38h
addvar_high equ 39h
;tempset equ 35h
;
; const define
sp_reg equ 65h
dmxchannel_page equ 2; 2;3
Dmxchannelbase_Max equ 255
dmxchannelbase_min equ 2
outdelayh equ 0ffh
outdelayl equ 0d8h;0f0h;66h;77e58 0bfh;0bfh;0dfh;0dfh
;HCS300
;************************************;
CSR0 EQU 40H
CSR1 EQU 41H
CSR2 EQU 42H ;RESERVE LOW BYTE
CSR3 EQU 43H ;RESERVE HIGH BYTE
;*************************;
CSR4 EQU 44H
CSR5 EQU 45H
CSR6 EQU 46H
CSR7 EQU 47H
CSR8 EQU 48H
;------------------------------------
HOP1 EQU 40h;CSR0
HOP2 EQU 41h;CSR1
HOP3 EQU 42h;CSR2
HOP4 EQU 43h;CSR3
;
KEY0 EQU 49H
KEY1 EQU 4AH
KEY2 EQU 4BH
KEY3 EQU 4CH
KEY4 EQU 4DH
KEY5 EQU 4EH
KEY6 EQU 4FH
KEY7 EQU 50H
;
CNT0 EQU 51H
CNT1 EQU 52H
CNT2 EQU 53H
HOP_LENGTH EQU 54H
MASK EQU 55H
SZ11BUF1 EQU 56H
SZ11BUF0 EQU 57H
csr0store equ 58h
csr1store equ 59h
csr2store equ 5Ah
csr3store equ 5Bh
csr4store equ 5Ch
csr5store equ 5Dh
csr6store equ 5Eh
csr7store equ 5Fh
csr8store equ 60h
;*********************************
;*********************************
;p0
adddata0 bit p0.0
adddata1 bit p0.1
adddata2 bit p0.2
adddata3 bit p0.3
adddata4 bit p0.4
adddata5 bit p0.5
adddata6 bit p0.6
adddata7 bit p0.7
;p1
data0 bit p1.4
data1 bit p1.5
data2 bit p1.6
data3 bit p1.7
;all null
;p2
address8 bit p2.0
address9 bit p2.1
address10 bit p2.2
address11 bit p2.3
KEELOQ_IN bit p2.4
KEY_IN bit p2.5
address14 bit p2.6
address15 bit p2.7
;p3
dmxrxd bit p3.0
dmxtxd bit p3.1
data4 bit p3.2
data5 bit p3.3
data6 bit p3.4
data7 bit p3.5
ramwrite bit p3.6
ramread bit p3.7
;p4
;p4.0 ledstatus
;*******************
;77e58 add define
p4 equ 0a5h
rommap equ 0c2h
ckcon equ 8eh
wdcon equ 0d8h
ewt bit 1
rwt bit 0
eie equ 0e8h
;************************************
; const define
ledfalshshort equ 1
ledfalshlong equ 10
ledfalshcount equ 5
;*********************************
;*********the progamer is start***
;*********************************
org 0000h
ljmp initiall_programer
org 0030h
initiall_programer:
mov ip,#00h ;the autr ip
mov ie,#00h
mov sp,#sp_reg
mov tmod,#21h
mov pcon,#00h
mov p0,#00h
mov p1,#0ffh
mov p2,#14H;04h
mov p3,#0ffh
mov p4,#00h
mov rommap,#00h
;initiall 77e58 resgter
mov ckcon,#0c0h
; mov rommap,#76h
clr ewt
clr rwt
mov eie,#00h
;;
mov 91h,#08h ;0000 1000
mov 0d8h,#00h
mov 0e8h,#00h
mov 8eh,#00h ; 0010 1011
;;
;initiall uart code
mov scon,#0dch
setb rclk
setb tclk
mov rcap2h,#0ffh
mov rcap2l,#0fdh
setb tr2
mov dmxdataposition_low,#1
mov dmxdataposition_high,#0
setb dmxframefalgs
setb dmxresetfalgs
clr ledrunfalgs
orl p4,#01h
; setb statusled
mov ledcount,#ledfalshcount
mov dmxtimer1,#ledfalshshort
mov temp,#15 ; wait 0.5s
initiall_hcs300:
lcall delay_timer
djnz temp,initiall_hcs300
mov linkcount,#10 ;; link 10
read_link_hcs300:
; test
mov TCON,#00H
setb KEY_IN
SETB KEELOQ_IN
JNB KEELOQ_IN,$
LCALL KEQ_RECEIVE
CLR KEY_IN
JNB runbf,read_link_error
; data store
mov csr0store,CSR0
mov csr1store,CSR1
mov csr2store,CSR2
mov csr3store,CSR3
mov csr4store,CSR4
mov csr5store,CSR5
mov csr6store,CSR6
mov csr7store,CSR7
mov csr8store,CSR8
lcall HP_RESTOREYES
LCALL HP_KEY_DAT
lcall DECRYPT
; test sn
mov a,CSR2
cjne a,SZ11BUF0,read_link_error
mov a,CSR3
anl a,#0fh
cjne a,SZ11BUF1,read_link_error
; test button
mov a,CSR3
swap a
anl a,#0fh
cjne a,#02h,read_link_error
ljmp read_hcs300_soure
read_link_error:
mov temp,#30
read_link_loop:
lcall delay_timer
djnz temp,read_link_loop ; delay read
djnz linkcount,read_link_hcs300
ljmp $
read_hcs300_soure: ; soure bf
lcall write_hopping_eram_low
lcall write_hopping_eram_high
LCALL write_other
lcall write_tagerat
; clear link pc falgas
mov dmxdataposition_low,#low(800)
mov dmxdataposition_high,#high(800)
mov dmxdatareg,#00h
lcall ram_write
mov dmxdataposition_low,#low(801)
mov dmxdataposition_high,#high(801)
mov dmxdatareg,#00h
lcall ram_write
ljmp main_programer
;************************************
;****** the programer loop test *****
;************************************
main_programer: ;1ms
;*************************************
clr tf0
mov tl0,#outdelayl
mov th0,#outdelayh
setb tr0
jnb tf0,$
clr tf0
clr tr0
lcall dmxdataout_initial
ljmp main_programer
;; not user
main_programerout:
jnb ti,$
clr tf0
mov tl0,#0dfh;9h;fh ;#0dfh
mov th0,#0ffh
setb tr0
jnb tf0,$
clr tf0
clr tr0
lcall dmxdataout_initial
ljmp main_programer
;*****************************************
;*****************************************
; space 1ms frame to frame 200us
;*****************************************
;*****************************************
dmxdataout_initial:
push acc
; push dpl
; push dph
clr ti
dmxdataout_framefalgstest:
jb dmxframefalgs,dmxdataout_resetfalgstest
clr txd ; dmxffamefalgs = 0
setb dmxframefalgs; ; 88us
setb dmxresetfalgs;
mov temp,#176;176;88
djnz temp,$
ljmp dmxdataout_quit
dmxdataout_resetfalgstest:
jnb dmxresetfalgs,dmxdataout_readoutdata
setb txd ; dmxresetfalgs = 1
; nop
; nop ; 8 us
; nop
; nop
; nop
; nop
; nop
; nop
; nop
; nop
; nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
setb tb8 ; bit 9, the bit is added stop bit;
mov a,#00
mov sbuf,a
mov dmxdataposition_low,#01h
mov dmxdataposition_high,#00h
lcall ram_read
mov addvar_low,#01h
mov addvar_high,#00h
lcall word_inc
clr dmxresetfalgs ;the frame data is set the bread and mark singal
jnb ti,$
ljmp dmxdataout_quit ;the 512 frame start out
dmxdataout_readoutdata:
;read the 1-512 channel data
setb tb8
mov a,dmxdatareg
mov sbuf,a
lcall ram_read
mov addvar_low,#01h
mov addvar_high,#00h
lcall word_inc
jnb ti,$
dmxdataout_testallchanneloutend:
jnb runbf,dmxdataout_allframeoutend
clr dmxframefalgs ; 512 all out end
;***********************
dmx_dataout_512end: ;delay 135us
clr tf0 ; #0d3h
mov tl0,#0f0h;#0f1h; 135us
mov th0,#0ffh;#0feh ;
setb tr0
jnb tf0,$
clr tf0
clr tr0
mov dmxdataposition_low,#low(800)
mov dmxdataposition_high,#high(800)
lcall ram_read
mov a,#0aah
cjne a,dmxdatareg,dmxdataout_allframeoutend
; pc link
mov dmxdataposition_low,#low(801)
mov dmxdataposition_high,#high(801)
mov dmxdatareg,#0aah
lcall ram_write
; 0.01s
mov dmxdatareg,#50
link_loop:
clr tf0
mov th0,#0b1h
mov tl0,#0e0h
setb tr0
jnb tf0,$
clr tf0
clr tr0
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