cf9222.78k

继续上传NEC单片机的例子程序,很好的东东.我在日电电子中国培训的材料.共享.

# stbc-if
wire_cgx_intrq += intc.Port("WAKEUP");
# nmi
wire_intc_nmiwdt = Wire(1);
wire_intc_nmiwdt += intc.Port("NMI0");
# int
wire_intc_intwdt = Wire(1);
wire_intc_intwdt += intc.Port("INT0");
wire_intc_intlvi = Wire(1);
wire_intc_intlvi += intc.Port("INT1");
wire_intc_intp0 = Wire(1);
wire_intc_intp0 += intc.Port("INT2");
wire_intc_intp1 = Wire(1);
wire_intc_intp1 += intc.Port("INT3");
wire_intc_inttmh1 = Wire(1);
wire_intc_inttmh1 += intc.Port("INT4");
wire_intc_inttm00 = Wire(1);
wire_intc_inttm00 += intc.Port("INT5");
wire_intc_inttm01 = Wire(1);
wire_intc_inttm01 += intc.Port("INT6");
wire_intc_intad = Wire(1);
wire_intc_intad += intc.Port("INT7");
wire_intc_intflc = Wire(1);
wire_intc_intflc += intc.Port("INT8");
wire_intc_intp2 = Wire(1);
wire_intc_intp2 += intc.Port("INT9");
wire_intc_intp3 = Wire(1);
wire_intc_intp3  += intc.Port("INT10");
wire_intc_inttm80 = Wire(1);
wire_intc_inttm80 += intc.Port("INT11");
wire_intc_intsre60 = Wire(1);
wire_intc_intsre60 += intc.Port("INT12");
wire_intc_intsr60 = Wire(1);
wire_intc_intsr60 += intc.Port("INT13");
wire_intc_intst60 = Wire(1);
wire_intc_intst60 += intc.Port("INT14");


#------	port	---------------------------------------------------------
# RESET
wire_cgx_vpres += port.Port("VBRES");
# port0
# port2
wire_port_ani0 = Wire(1);
wire_port_ani0 += port.Port("M20_0");
wire_port_ani1 = Wire(1);
wire_port_ani1 += port.Port("M21_0");
wire_port_ani2 = Wire(1);
wire_port_ani2 += port.Port("M22_0");
wire_port_ani3 = Wire(1);
wire_port_ani3 += port.Port("M23_0");
# port3
wire_port_ti000 = Wire(1);
wire_port_ti000 += port.Port("M30_0");
wire_intc_intp0 += port.Port("M30_1");
wire_port_ti010 = Wire(1);
wire_port_ti010 += port.Port("M31_0");
wire_port_to000 = Wire(1);
wire_port_to000 += port.Port("M31_1");
wire_intc_intp2 += port.Port("M31_2");
wire_cgx_resetz += port.Port("M34_0");
# port4
wire_intc_intp3 += port.Port("M41_0");
wire_port_toh1 = Wire(1);
wire_port_toh1 += port.Port("M42_0");
wire_port_txd6 = Wire(1);
wire_port_txd6 += port.Port("M43_0");
wire_intc_intp1 += port.Port("M43_1");
wire_port_rxd6 = Wire(1);
wire_port_rxd6 += port.Port("M44_0");
# port12
# port13


#SAMPLE ------	Sample	--------------------------------------------------------
#SAMPLE # RESET
#SAMPLE wire_cgx_vpres += sample.Port("XXXRES");
#SAMPLE # CLOCK
#SAMPLE wire_cgx_vppprsN += sample.Port("XXXCKIN");
#SAMPLE ...
#SAMPLE # INTERRUPT
#SAMPLE wire_intc_intXXX += sample.Port("INTXXX");
#SAMPLE # WDTRES (WDT only)
#SAMPLE wire_cgx_wdtres += sample.Port("WDTRES");
#SAMPLE # PORT
#SAMPLE wire_port_XXX += sample.Port("XXX");
#SAMPLE ...
#SAMPLE # etc.
#SAMPLE ...


#------	timer0	---------------------------------------------------------
wire_cgx_vpres += timer0.Port("RESB");
wire_cgx_vppprs0 += timer0.Port("CKSEL1");
wire_cgx_vppprs1 += timer0.Port("CKSEL2");
wire_cgx_vppprs2 += timer0.Port("CKSEL3");
wire_cgx_vppprs3 += timer0.Port("CKSEL4");

wire_port_ti000 += timer0.Port("TI00");
wire_port_ti010 += timer0.Port("TI01");
wire_port_to000 += timer0.Port("TO0");
wire_intc_inttm00 += timer0.Port("INTTM00");
wire_intc_inttm01 += timer0.Port("INTTM01");


#------	timerH	---------------------------------------------------------
wire_cgx_vpres += timerH.Port("RESB");
wire_cgx_vppprs0 += timerH.Port("CKSEL0");
wire_cgx_vppprs1 += timerH.Port("CKSEL1");
wire_cgx_vppprs2 += timerH.Port("CKSEL2");
wire_cgx_vppprs3 += timerH.Port("CKSEL3");
wire_cgx_vppprs4 += timerH.Port("CKSEL4");
wire_cgx_vppprs5 += timerH.Port("CKSEL5");

wire_port_toh1 += timerH.Port("TOH");
wire_intc_inttmh1 += timerH.Port("INTTMH");

wire_intc_inttm5 = Wire(1);
wire_intc_inttm5 += timerH.Port("INTTM5");
wire_intc_inttmh5 = Wire(1);
#wire_intc_inttmh5 += timerH.Port("INTTMH5");


#------	timer8	---------------------------------------------------------
wire_cgx_vpres += timer8.Port("RESB");
wire_cgx_vppprs1 += timer8.Port("CKSEL1");
wire_cgx_vppprs2 += timer8.Port("CKSEL2");
wire_cgx_vppprs3 += timer8.Port("CKSEL3");
wire_cgx_vppprs4 += timer8.Port("CKSEL4");

#wire_port_to8 += timer8.Port("TO8");
wire_intc_inttm80 += timer8.Port("INTTM8");


#------	uart6	---------------------------------------------------------
wire_cgx_vpres += uart6.Port("RESB");
wire_cgx_vppprs0 += uart6.Port("CKSEL0");
wire_cgx_vppprs1 += uart6.Port("CKSEL1");
wire_cgx_vppprs2 += uart6.Port("CKSEL2");
wire_cgx_vppprs3 += uart6.Port("CKSEL3");
wire_cgx_vppprs4 += uart6.Port("CKSEL4");
wire_cgx_vppprs5 += uart6.Port("CKSEL5");
wire_cgx_vppprs6 += uart6.Port("CKSEL6");
wire_cgx_vppprs7 += uart6.Port("CKSEL7");
wire_cgx_vppprs8 += uart6.Port("CKSEL8");
wire_cgx_vppprs9 += uart6.Port("CKSEL9");
wire_cgx_vppprs10 += uart6.Port("CKSEL10");
wire_cgx_vppprs11 += uart6.Port("CKSEL11");

wire_port_rxd6 += uart6.Port("RXD");
wire_port_txd6 += uart6.Port("TXD");
wire_intc_intst60 += uart6.Port("INTST");
wire_intc_intsr60 += uart6.Port("INTSR");
wire_intc_intsre60 += uart6.Port("INTSRE");


#------	adctl0	---------------------------------------------------------
wire_cgx_vpres += adctl0.Port("RES_B");
wire_cgx_vppprs3 += adctl0.Port("CKSEL0");
wire_cgx_vppprs4 += adctl0.Port("CKSEL1");

wire_port_ani0 += adctl0.Port("ANI0");
wire_port_ani1 += adctl0.Port("ANI1");
wire_port_ani2 += adctl0.Port("ANI2");
wire_port_ani3 += adctl0.Port("ANI3");
#wire_port_ani4 += adctl0.Port("ANI4");
#wire_port_ani5 += adctl0.Port("ANI5");
#wire_port_ani6 += adctl0.Port("ANI6");
#wire_port_ani7 += adctl0.Port("ANI7");

wire_intc_intad += adctl0.Port("INTAD");

wire_adctl0_adtrg = Wire(1);
wire_adctl0_adtrg += adctl0.Port("ADTRG");
wire_adctl0_avref = Wire(1);
wire_adctl0_avref += adctl0.Port("ADREF");


#------	poclvi	---------------------------------------------------------
wire_poclvi_pocout = Wire(1);
wire_poclvi_pocout += poclvi.Port("POCOUT");
wire_poclvi_lviout = Wire(1);
wire_poclvi_lviout += poclvi.Port("LVIOUT");
wire_poclvi_lvion = Wire(1);
wire_poclvi_lvion += poclvi.Port("LVION");
wire_poclvi_bgrdis = Wire(1);
wire_poclvi_bgrdis += poclvi.Port("BGRDIS");
wire_poclvi_lvis0 = Wire(1);
wire_poclvi_lvis0 += poclvi.Port("LVIS0");
wire_poclvi_lvis1 = Wire(1);
wire_poclvi_lvis1 += poclvi.Port("LVIS1");
wire_poclvi_lvis2 = Wire(1);
wire_poclvi_lvis2 += poclvi.Port("LVIS2");
wire_poclvi_lvis3 = Wire(1);
wire_poclvi_lvis3 += poclvi.Port("LVIS3");

wire_cgx_lvimclrres += poclvi.Port("LVIMCLR");
wire_cgx_pocres += poclvi.Port("POCRESB");
wire_cgx_lvires += poclvi.Port("LVIRESB");
wire_intc_intlvi += poclvi.Port("INTLVI");


#------	wdt	---------------------------------------------------------
wire_cgx_vpres += wdt.Port("VPRESZ");       
wire_cgx_wdtres += wdt.Port("WDTRES");      
wire_cgx_vppprs0 += wdt.Port("CKSEI0");      # ringctl.rclk8, unsupported
wire_cgx_vppprs0 += wdt.Port("CKSEI1");
wire_cgx_vppprs0 += wdt.Port("CKSEI2");       
wire_intc_nmiwdt += wdt.Port("WDTNMI");
#wire_intc_intwdt += wdt.Port("INTWDT");        # open net
#wire_wdt_wdtmd0 = Wire(1);
#wire_wdt_wdtmd0 += wdt.Port("WDTMD0");        # VDD_CLAMP
#wire_wdt_wdtmd1 = Wire(1);
#wire_wdt_wdtmd1 += wdt.Port("WDTMD1");        # fmop.MOP1 ?
#wire_wdt_intnmdt = Wire(1);
#wire_wdt_intnmdt += wdt.Port("INTNMDT");      # open net
#wire_wdt_wdtmd = Wire(1);
#wire_wdt_wdtmd += wdt.Port("WDTMD");         # open net



#========================================================================
#	Bus slave name
#========================================================================

#------	cpu	---------------------------------------------------------
#busname_cpu_bpc = BusSlaveName("BPC");
#busname_cpu_bpc |= cpu.BusSlaveIF("BPC");
#busname_cpu_bsc = BusSlaveName("BSC");
#busname_cpu_bsc |= cpu.BusSlaveIF("BSC");
#busname_cpu_vswc = BusSlaveName("VSWC");
#busname_cpu_vswc |= cpu.BusSlaveIF("VSWC");

#------	timer0	---------------------------------------------------------
busname_timer0_tm0 = BusSlaveName("TM00");
busname_timer0_tm0 |= timer0.BusSlaveIF("TM0");
busname_timer0_cr00 = BusSlaveName("CR000");
busname_timer0_cr00 |= timer0.BusSlaveIF("CR00");
busname_timer0_cr01 = BusSlaveName("CR010");
busname_timer0_cr01 |= timer0.BusSlaveIF("CR01");
busname_timer0_tmc0 = BusSlaveName("TMC00");
busname_timer0_tmc0 |= timer0.BusSlaveIF("TMC0");
busname_timer0_prm0 = BusSlaveName("PRM00");
busname_timer0_prm0 |= timer0.BusSlaveIF("PRM0");
busname_timer0_crc0 = BusSlaveName("CRC00");
busname_timer0_crc0 |= timer0.BusSlaveIF("CRC0");
busname_timer0_toc0 = BusSlaveName("TOC00");
busname_timer0_toc0 |= timer0.BusSlaveIF("TOC0");

#------	timerH	---------------------------------------------------------
busname_timerh_tmhmd = BusSlaveName("TMHMD1");
busname_timerh_tmhmd |= timerH.BusSlaveIF("TMHMD");
#busname_timerh_tmcyc = BusSlaveName("TMCYC1");
#busname_timerh_tmcyc |= timerH.BusSlaveIF("TMCYC");
busname_timerh_cmp0 = BusSlaveName("CMP01");
busname_timerh_cmp0 |= timerH.BusSlaveIF("CMP0");
#busname_timerh_cmp1 = BusSlaveName("CMP11");
#busname_timerh_cmp1 |= timerH.BusSlaveIF("CMP1");

#------	timer8	---------------------------------------------------------
busname_timer8_tmc8 = BusSlaveName("TMC80");
busname_timer8_tmc8 |= timer8.BusSlaveIF("TMC8");
busname_timer8_cr8 = BusSlaveName("CR80");
busname_timer8_cr8 |= timer8.BusSlaveIF("CR8");
busname_timer8_tm8 = BusSlaveName("TM80");
busname_timer8_tm8 |= timer8.BusSlaveIF("TM8");

#------	uart6	---------------------------------------------------------
busname_uart6_asim = BusSlaveName("ASIM6");
busname_uart6_asim |= uart6.BusSlaveIF("ASIM");
busname_uart6_rxb = BusSlaveName("RXB6");
busname_uart6_rxb |= uart6.BusSlaveIF("RXB");