resetuut.c

详细介绍了一篇关于pci开发的接口芯片

/*
	reset_uut.c

*/

#include <stdtypes.h>
#include <conio.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>

/* non-standard includes... */
#include <clib1.h>
#include <lib.h>
#include <main.h>
#include <amcclib.h>
#include <nvram.h>

extern struct _chip chip_uut, chip_control;
extern UINT32 control;

#define CHECKPCI  	if ( status != PCI_SUCCESSFUL ) \
					return pci_bios_fail( status );

int reset_uut( int restore_config )
/*
	Physically resets the UUT.

	Entry:	restore_config - TRUE if caller wants to restore the base address
			values and other config registers.

	Note:	If caller modifies nvRAM such that the size of any regions
			change, an address (or I/O) space conflict may occur with
			other devices, and the address may not fall on a valid
			boundary. In these cases, he should not restore_config.

	Return:	TRUE if OK, else FALSE and errstring updated
*/
{
	int status;
	UINT8 config_space_uut[PCI_CONFIG_SIZE];

	if ( restore_config )
	{
		// save current PCI configuration before reset...
		status = pciReadBuf( chip_uut.bus, chip_uut.device, config_space_uut, PCI_CONFIG_SIZE );
		CHECKPCI
	}


	// reset the UUT...
//	bset_control_reg( CTRL_UUTRSTH );
//	bclr_control_reg( CTRL_UUTRSTH );
//
// DEH debug - for some reason, must reset UUT using SYSRESET of the
// control 5920. If use RESETH, the reset only goes away when SYSRESET 
// is activated. Side effect is that mailbox flags may not be reset since 
// the entire control register is reset by using SYSRESET.
//
// This makes sense, because UUTRESET also resets the control chip FPGA.
// Therefore, only use SYSRESET...
	bset_region32( &chip_control, 0, RCR, 0x01000000L );
	bclr_region32( &chip_control, 0, RCR, 0x01000000L );
	write_control_reg( control );	// was just reset, so restore it

	if ( restore_config )
	{
		status = restore_uut_config( config_space_uut );
		if ( status != PCI_SUCCESSFUL )
		{
			pci_bios_fail(status);			\
			return FALSE;
		}
	}

	return TRUE;
}


int restore_uut_config( UINT8 *config_space )
/*
	Restore PCI configuration. Typically used after UUT is reset.
	Restores:	base address registers (incl XROM)
				cache line
				interrupt thru max latency
				command register (last)

	Entry:	pointer to byte-wise copy of PCI config space as read after BIOS
			configured the part

	Return:	PCI_SUCCESSFUL if OK, else PCI_x and errstring

	Data is written swapped since was read as bytes.
*/
{
	int status;

	// BADR0-4
/*	status = program_base_addresses ( 	\
		swaplong ( *(UINT32 *)( &config_space[PCI_CS_BASE_ADDRESS_0] ) ), \
		swaplong ( *(UINT32 *)( &config_space[PCI_CS_BASE_ADDRESS_1] ) ), \
		swaplong ( *(UINT32 *)( &config_space[PCI_CS_BASE_ADDRESS_2] ) ), \
		swaplong ( *(UINT32 *)( &config_space[PCI_CS_BASE_ADDRESS_3] ) ), \
		swaplong ( *(UINT32 *)( &config_space[PCI_CS_BASE_ADDRESS_4] ) )
	);
	CHECKPCI

	// Expansion ROM base address
	status = pci_config_write32( &chip_uut, PCI_CS_EXPANSION_ROM, \
		swaplong ( *(UINT32 *)( &config_space[PCI_CS_EXPANSION_ROM] ) ) );
	CHECKPCI
*/

	status = program_base_addresses ( 	\
		*(UINT32 *)( &config_space[PCI_CS_BASE_ADDRESS_0] ), \
		*(UINT32 *)( &config_space[PCI_CS_BASE_ADDRESS_1] ), \
		*(UINT32 *)( &config_space[PCI_CS_BASE_ADDRESS_2] ), \
		*(UINT32 *)( &config_space[PCI_CS_BASE_ADDRESS_3] ), \
		*(UINT32 *)( &config_space[PCI_CS_BASE_ADDRESS_4] )
	);
	CHECKPCI

	// Expansion ROM base address
	status = pci_config_write32( &chip_uut, PCI_CS_EXPANSION_ROM, \
		*(UINT32 *)( &config_space[PCI_CS_EXPANSION_ROM] ) );
	CHECKPCI

	// cache line register
	status = pci_config_write8( &chip_uut, PCI_CS_CACHE_LINE_SIZE, \
		config_space[PCI_CS_CACHE_LINE_SIZE] );
	CHECKPCI

	// interrupt line thru max latency...
/*
	status = pci_config_write32( &chip_uut, PCI_CS_INTERRUPT_LINE, \
		swaplong ( *(UINT32 *)(&config_space[PCI_CS_INTERRUPT_LINE]) ) );
*/
	status = pci_config_write32( &chip_uut, PCI_CS_INTERRUPT_LINE, \
		*(UINT32 *)(&config_space[PCI_CS_INTERRUPT_LINE]) );
	CHECKPCI

	// command register LAST (re-enables memory and I/O) !!!
/*
	status = pci_config_write16( &chip_uut, PCI_CS_COMMAND, \
		swapword( *(UINT16 *)(&config_space[PCI_CS_COMMAND]) ) );
*/
	status = pci_config_write16( &chip_uut, PCI_CS_COMMAND, \
		*(UINT16 *)(&config_space[PCI_CS_COMMAND]) );
	CHECKPCI
	
	return PCI_SUCCESSFUL;
}