at45.c

基于AT91SAM9260的bootloader

//*----------------------------------------------------------------------------
//*      ATMEL Microcontroller Software Support  -  ROUSSET  -
//*----------------------------------------------------------------------------
//* The software is delivered "AS IS" without warranty or condition of any
//* kind, either express, implied or statutory. This includes without
//* limitation any warranty or condition with respect to merchantability or
//* fitness for any particular purpose, or against the infringements of
//* intellectual property rights of others.
//*----------------------------------------------------------------------------
//* File Name           : at45c.h
//* Object              : 
//*
//* 1.0  10/12/03 HIi    : Creation.
//* 1.01 03/05/04 HIi    : Bug Fix in AT91F_DataFlashWaitReady() Function.
//*----------------------------------------------------------------------------
#include "dataflash.h"
#include "main.h"

/*----------------------------------------------------------------------------*/
/* \fn    AT91F_SpiEnable					      							  */
/* \brief Enable SPI chip select											  */
/*----------------------------------------------------------------------------*/
void AT91F_SpiEnable(int cs) {
	
	switch(cs)
	{
		case 0:	/* Configure SPI CS0 for Serial DataFlash AT45DBxx */
			AT91C_BASE_SPI0->SPI_MR &= 0xFFF0FFFF;
			AT91C_BASE_SPI0->SPI_MR |= ((AT91C_SPI_PCS0_SERIAL_DATAFLASH) & AT91C_SPI_PCS);
			break;
		case 1:	/* Configure SPI CS0 for Serial DataFlash AT45DBxx */
			AT91C_BASE_SPI0->SPI_MR &= 0xFFF0FFFF;
			AT91C_BASE_SPI0->SPI_MR |= ((AT91C_SPI_PCS1_SERIAL_DATAFLASH) & AT91C_SPI_PCS);
			break;	
		case 3:	/* Configure SPI CS3 for Serial DataFlash Card */
			/* Configure PCS */
			AT91C_BASE_SPI0->SPI_MR &= 0xFFF0FFFF;
			AT91C_BASE_SPI0->SPI_MR |= ((AT91C_SPI_PCS3_DATAFLASH_CARD) & AT91C_SPI_PCS);
			break;
	}
}

/*----------------------------------------------------------------------------*/
/* \fn    AT91F_SpiInit						      							  */
/* \brief SPI Low level Init												  */
/*----------------------------------------------------------------------------*/
void AT91F_SpiInit(void) {

	volatile unsigned int uDummy;

	// Clock SPI
  	AT91F_SPI0_CfgPMC();
 	// Configure PIO
	AT91F_PIO_CfgPeriph(
		AT91C_BASE_PIOA, // PIO controller base address
		((unsigned int) AT91C_PA1_SPI0_MOSI) |
		((unsigned int) AT91C_PA3_SPI0_NPCS0) |
		((unsigned int) AT91C_PA0_SPI0_MISO) |
		((unsigned int) AT91C_PA2_SPI0_SPCK), // Peripheral A
		0); // Peripheral B
        AT91F_PIO_CfgPeriph(
		AT91C_BASE_PIOC, // PIO controller base address
		0,// Peripheral A
		((unsigned int) AT91C_PC11_SPI0_NPCS1)		
		); // Peripheral B
	// Disable pullup for PA0-PA6
//	AT91F_PIO_CfgPullup(AT91C_BASE_PIOA, 0xffffff80);
	
	// Reset the SPI
  	AT91F_SPI_Reset(AT91C_BASE_SPI0);

  	// Configure SPI in master and fixed mode with a different CS each time
  	AT91F_SPI_CfgMode(AT91C_BASE_SPI0, AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS0);
  
	AT91F_SPI_CfgCs(AT91C_BASE_SPI0, 
					1, 
					AT91C_SPI_CPOL | 
					(AT91C_SPI_DLYBS & AT91C_DATAFLASH_TCSS) |
					(AT91C_SPI_DLYBCT & AT91C_DATAFLASH_TCSH)|
					AT91C_SPI_BITS_8 | ((AT91C_MASTER_CLOCK/AT91C_DATAFLASH_CLK) << 8));

    // Choose CSx
    AT91C_BASE_SPI0->SPI_MR &= 0xFFF0FFFF;
    AT91C_BASE_SPI0->SPI_MR |= ((AT91C_SPI_PCS1_SERIAL_DATAFLASH) & AT91C_SPI_PCS);

   	AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTDIS | AT91C_PDC_RXTDIS;

  	// Enable the SPI
	AT91F_SPI_Enable(AT91C_BASE_SPI0);

	for (uDummy=0; uDummy<100000; uDummy++);

	uDummy = AT91C_BASE_SPI0->SPI_SR;	
	uDummy = AT91C_BASE_SPI0->SPI_RDR;

}

/*----------------------------------------------------------------------------*/
/* \fn    AT91F_SpiWrite						                              */
/* \brief Set the PDC registers for a transfert				                  */
/*----------------------------------------------------------------------------*/
unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc, unsigned int timeout)
{
   	volatile unsigned int tmp; //timeout;
	
	pDesc->state = BUSY;

   	/* Initialize the Transmit and Receive Pointer */
    	AT91C_BASE_SPI0->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ;
    	AT91C_BASE_SPI0->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ;

    	/* Intialize the Transmit and Receive Counters */
    	AT91C_BASE_SPI0->SPI_RCR = pDesc->rx_cmd_size;
    	AT91C_BASE_SPI0->SPI_TCR = pDesc->tx_cmd_size;

	if ( pDesc->tx_data_size != 0 ) {
	   	/* Initialize the Next Transmit and Next Receive Pointer */
	   	AT91C_BASE_SPI0->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ;
		AT91C_BASE_SPI0->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ;

		/* Intialize the Next Transmit and Next Receive Counters */
		AT91C_BASE_SPI0->SPI_RNCR = pDesc->rx_data_size ;
	 	AT91C_BASE_SPI0->SPI_TNCR = pDesc->tx_data_size ;
   	}

     /* arm simple, non interrupt dependent timer */
/*	timeout = 0;
	AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN;
	while(!(AT91C_BASE_SPI0->SPI_SR & AT91C_SPI_RXBUFF));

   	AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
   	pDesc->state = IDLE;
   	
	if (timeout >= AT91C_DATAFLASH_TIMEOUT){
		return AT91C_DATAFLASH_ERROR;
	}
*/
	AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN;

	// Wait for End of Rx
	tmp = 0;
	while( !(AT91C_BASE_SPI0->SPI_SR & AT91C_SPI_RXBUFF) && (tmp++ < timeout) );

   	AT91C_BASE_SPI0->SPI_PTCR = AT91C_PDC_TXTDIS | AT91C_PDC_RXTDIS;
   	pDesc->state = IDLE;

	if (tmp >= timeout)
		return AT91C_DATAFLASH_ERROR;

	return AT91C_DATAFLASH_OK;
}


/*----------------------------------------------------------------------*/
/* \fn    AT91F_DataFlashSendCommand					*/
/* \brief Generic function to send a command to the dataflash		*/
/*----------------------------------------------------------------------*/
AT91S_DataFlashStatus AT91F_DataFlashSendCommand(
	AT91PS_DataFlash pDataFlash,
	unsigned char OpCode,
	unsigned int CmdSize,
	unsigned int DataflashAddress)
{
    unsigned int adr;

	if ( (pDataFlash->pDataFlashDesc->state) != IDLE)
		return AT91C_DATAFLASH_BUSY;

	/* process the address to obtain page address and byte address */
	adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) << pDataFlash->pDevice->page_offset) + (DataflashAddress % (pDataFlash->pDevice->pages_size));

	/* fill the  command  buffer */
	pDataFlash->pDataFlashDesc->command[0] = OpCode;
	if (pDataFlash->pDevice->pages_number >= 16384)
	{
		pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x0F000000) >> 24);
		pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x00FF0000) >> 16);
		pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((adr & 0x0000FF00) >> 8);
		pDataFlash->pDataFlashDesc->command[4] = (unsigned char)(adr & 0x000000FF);
	}
	else
	{	
		pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x00FF0000) >> 16);
		pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x0000FF00) >> 8);
		pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(adr & 0x000000FF) ;
		pDataFlash->pDataFlashDesc->command[4] = 0;
	}
	pDataFlash->pDataFlashDesc->command[5] = 0;
	pDataFlash->pDataFlashDesc->command[6] = 0;
	pDataFlash->pDataFlashDesc->command[7] = 0;

	/* Initialize the SpiData structure for the spi write fuction */
	pDataFlash->pDataFlashDesc->tx_cmd_pt   =  pDataFlash->pDataFlashDesc->command ;
	pDataFlash->pDataFlashDesc->tx_cmd_size =  CmdSize ;
	pDataFlash->pDataFlashDesc->rx_cmd_pt   =  pDataFlash->pDataFlashDesc->command ;
	pDataFlash->pDataFlashDesc->rx_cmd_size =  CmdSize ;

	return AT91F_SpiWrite (pDataFlash->pDataFlashDesc, AT91C_DATAFLASH_STATUS_TIMEOUT);			
}


/*----------------------------------------------------------------------*/
/* \fn    AT91F_DataFlashGetStatus					*/
/* \brief Read the status register of the dataflash			*/
/*----------------------------------------------------------------------*/
AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc)
{
	AT91S_DataFlashStatus status;

	/* if a transfert is in progress ==> return 0 */
	if( (pDesc->state) != IDLE)
		return AT91C_DATAFLASH_BUSY;

	/* first send the read status command (D7H) */
	pDesc->command[0] = DB_STATUS;
	pDesc->command[1] = 0;

	pDesc->DataFlash_state  = GET_STATUS;
    	pDesc->tx_data_size 	= 0 ;	/* Transmit the command and receive response */
    	pDesc->tx_cmd_pt 		= pDesc->command ;
    	pDesc->rx_cmd_pt 		= pDesc->command ;
    	pDesc->rx_cmd_size 		= 2 ;
    	pDesc->tx_cmd_size 		= 2 ;
    	status = AT91F_SpiWrite (pDesc, AT91C_DATAFLASH_STATUS_TIMEOUT);

	pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1);
	return status;
}

#if 0
/*----------------------------------------------------------------------*/
/* fn    AT91F_DataFlashExtID											*/
/* brief Read the extended ID											*/
/*----------------------------------------------------------------------*/
AT91S_DataFlashStatus AT91F_DataFlashExtID(AT91PS_DataflashDesc pDesc)
{
	AT91S_DataFlashStatus status;

	/* if a transfert is in progress ==> return 0 */
	if( (pDesc->state) != IDLE)
		return AT91C_DATAFLASH_BUSY;

	/* first send the read status command (D7H) */
	pDesc->command[0] = 0x9F;
	pDesc->command[1] = 0;

	pDesc->DataFlash_state  = GET_STATUS;
    	pDesc->tx_data_size 	= 0 ;	/* Transmit the command and receive response */
    	pDesc->tx_cmd_pt 	= pDesc->command ;
    	pDesc->rx_cmd_pt 	= pDesc->command ;
    	pDesc->rx_cmd_size 	= 5 ;
    	pDesc->tx_cmd_size 	= 5 ;
    	status = AT91F_SpiWrite (pDesc);

	pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1);

	return status;
}
#endif


//*-----------------------------------------------------------------------------
//* Function Name       : AT91F_DataFlashWaitReady
//* Object              : wait for dataflash ready (bit7 of the status register == 1)
//* Input Parameters    : DataFlash Service and timeout
//* Return value		: DataFlash status "ready or not"
//*-----------------------------------------------------------------------------
AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc pDataFlashDesc, unsigned int timeout)
{
	volatile unsigned int tick;

	tick = GetTickCount();

	while((pDataFlashDesc->state != IDLE) && ((volatile unsigned int)GetTickCount() < (tick + timeout)));

	if(pDataFlashDesc->state != IDLE)
		return AT91C_DATAFLASH_ERROR;

	pDataFlashDesc->DataFlash_state = 0;
	do
	{
		(volatile unsigned int)AT91F_DataFlashGetStatus(pDataFlashDesc);
		if((pDataFlashDesc->DataFlash_state & 0x80) == 0x80)
			return AT91C_DATAFLASH_OK;
	}
	while(1);
	return AT91C_DATAFLASH_ERROR;
}


/*------------------------------------------------------------------------------*/
/* Function Name       : AT91F_DataFlashContinuousRead 				*/
/* Object              : Continuous stream Read 				*/
/* Input Parameters    : DataFlash Service					*/
/*						: <src> = dataflash address	*/
/*                     : <*dataBuffer> = data buffer pointer			*/
/*                     : <sizeToRead> = data buffer size			*/
/* Return value		: State of the dataflash				*/
/*------------------------------------------------------------------------------*/
AT91S_DataFlashStatus AT91F_DataFlashContinuousRead (
 	AT91PS_DataFlash pDataFlash,
	int src,
	unsigned char *dataBuffer,
	int sizeToRead )
{
	AT91S_DataFlashStatus status;
	/* Test the size to read in the device */
	if ( (src + sizeToRead) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
		return AT91C_DATAFLASH_MEMORY_OVERFLOW;

	pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer;
	pDataFlash->pDataFlashDesc->rx_data_size = sizeToRead;
	pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer;
	pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead;
	
	status = AT91F_DataFlashSendCommand (pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src);
	/* Send the command to the dataflash */
	return(status);
}