📄 specctra.log,1
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# End Pass 13 of 25
# Start Route Pass 14 of 25
# Routing 20 wires.
# <<WARNING:>> Net RD0 redundant connection.
# 13 bend points have been removed.
# 14 bend points have been removed.
# Total Conflicts: 7 (Cross: 3, Clear: 4, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 2
# Attempts 9 Successes 8 Failures 1 Vias 586
# Cpu Time = 0:00:04 Elapsed Time = 0:00:04
# End Pass 14 of 25
# Start Route Pass 15 of 25
# Routing 8 wires.
# 22 bend points have been removed.
# 3 bend points have been removed.
# Total Conflicts: 11 (Cross: 5, Clear: 6, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 1
# Attempts 4 Successes 4 Failures 0 Vias 585
# Cpu Time = 0:00:01 Elapsed Time = 0:00:02
# End Pass 15 of 25
# Start Route Pass 16 of 25
# Routing 12 wires.
# 1 bend points have been removed.
# 5 bend points have been removed.
# Total Conflicts: 4 (Cross: 1, Clear: 3, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 1
# Attempts 5 Successes 5 Failures 0 Vias 586
# Cpu Time = 0:00:03 Elapsed Time = 0:00:03
# End Pass 16 of 25
# Start Route Pass 17 of 25
# Routing 3 wires.
# Total Conflicts: 4 (Cross: 1, Clear: 3, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 0
# Attempts 2 Successes 2 Failures 0 Vias 582
# Cpu Time = 0:00:01 Elapsed Time = 0:00:01
# End Pass 17 of 25
# Start Route Pass 18 of 25
# Routing 4 wires.
# Total Conflicts: 4 (Cross: 1, Clear: 3, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 0
# Attempts 2 Successes 2 Failures 0 Vias 582
# Cpu Time = 0:00:01 Elapsed Time = 0:00:01
# End Pass 18 of 25
# Start Route Pass 19 of 25
# Routing 2 wires.
# Total Conflicts: 4 (Cross: 1, Clear: 3, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 0
# Attempts 0 Successes 0 Failures 0 Vias 582
# Cpu Time = 0:00:01 Elapsed Time = 0:00:01
# End Pass 19 of 25
# Start Route Pass 20 of 25
# Routing 4 wires.
# 21 bend points have been removed.
# 2 bend points have been removed.
# Total Conflicts: 4 (Cross: 1, Clear: 3, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 0
# Attempts 2 Successes 2 Failures 0 Vias 582
# Cpu Time = 0:00:01 Elapsed Time = 0:00:01
# End Pass 20 of 25
# Start Route Pass 21 of 25
# Routing 2 wires.
# Total Conflicts: 4 (Cross: 1, Clear: 3, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 0
# Attempts 0 Successes 0 Failures 0 Vias 582
# Cpu Time = 0:00:01 Elapsed Time = 0:00:01
# End Pass 21 of 25
# Start Route Pass 22 of 25
# Routing 4 wires.
# Total Conflicts: 4 (Cross: 1, Clear: 3, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 0
# Attempts 2 Successes 2 Failures 0 Vias 582
# Cpu Time = 0:00:01 Elapsed Time = 0:00:02
# End Pass 22 of 25
# Start Route Pass 23 of 25
# Routing 2 wires.
# Total Conflicts: 4 (Cross: 1, Clear: 3, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 0
# Attempts 0 Successes 0 Failures 0 Vias 582
# Cpu Time = 0:00:01 Elapsed Time = 0:00:02
# End Pass 23 of 25
# Start Route Pass 24 of 25
# Routing 4 wires.
# Total Conflicts: 4 (Cross: 1, Clear: 3, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 0
# Attempts 2 Successes 2 Failures 0 Vias 582
# Cpu Time = 0:00:01 Elapsed Time = 0:00:01
# End Pass 24 of 25
# Start Route Pass 25 of 25
# Routing 2 wires.
# 19 bend points have been removed.
# 0 bend points have been removed.
# Total Conflicts: 4 (Cross: 1, Clear: 3, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 0
# Attempts 0 Successes 0 Failures 0 Vias 582
# Cpu Time = 0:00:02 Elapsed Time = 0:00:02
# End Pass 25 of 25
# Cpu Time = 0:01:32 Elapsed Time = 0:01:41
#
# Design Rules --------------------------------------------
# Via Grid 0.0100 with offset 0.0000
# Layer TOP Horz Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
# Layer BOTTOM Vert Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
# ROUTING HISTORY ================================================================
# Pass | Conflicts | | | | | |Red| CPU Time |
# Name |No.| Cross| Clear|Fail|Unrte| Vias|XTalk|Len.| % | Pass | Total |
#----------+---+------+------+----+-----+-----+-----+----+---+---------+---------|
# Route | 1| 999| 25| 0| 0| 284| 0| 0| 0| 0:00:04| 0:00:04|
# Route | 2| 528| 70| 21| 0| 410| 0| 0| 41| 0:00:10| 0:00:14|
# Route | 3| 245| 45| 18| 1| 465| 0| 0| 51| 0:00:12| 0:00:26|
# Route | 4| 82| 44| 11| 0| 486| 0| 0| 56| 0:00:11| 0:00:37|
# Route | 5| 46| 32| 15| 0| 533| 0| 0| 38| 0:00:13| 0:00:50|
# Route | 6| 16| 16| 3| 0| 575| 0| 0| 58| 0:00:06| 0:00:56|
# Route | 7| 18| 14| 1| 0| 571| 0| 0| 0| 0:00:03| 0:00:59|
# Route | 8| 5| 7| 0| 0| 572| 0| 0| 62| 0:00:02| 0:01:01|
# Route | 9| 10| 4| 0| 0| 577| 0| 0| 0| 0:00:03| 0:01:04|
# Route | 10| 3| 12| 0| 0| 583| 0| 0| 0| 0:00:02| 0:01:06|
# Route | 11| 1| 16| 0| 0| 595| 0| 0| 0| 0:00:02| 0:01:08|
# Route | 12| 3| 27| 0| 0| 590| 0| 0| 0| 0:00:03| 0:01:11|
# Route | 13| 3| 21| 1| 0| 588| 0| 0| 20| 0:00:01| 0:01:12|
# Route | 14| 3| 4| 1| 2| 586| 0| 0| 70| 0:00:04| 0:01:16|
# Route | 15| 5| 6| 0| 1| 585| 0| 0| 0| 0:00:01| 0:01:17|
# Route | 16| 1| 3| 0| 1| 586| 0| 0| 63| 0:00:03| 0:01:20|
# Route | 17| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:21|
# Route | 18| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:22|
# Route | 19| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:23|
# Route | 20| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:24|
# Route | 21| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:25|
# Route | 22| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:26|
# Route | 23| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:27|
# Route | 24| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:28|
# Route | 25| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:02| 0:01:30|
# Conflicts between polygon wires and fixed objects: 0
# Stub Violations: 0
# Net Order Violations: 0
# Diffpair Uncoupled Length Violations: 0
# Diffpair Phase Tolerance Violations: 0
# Total layerset violations: 0
# Total layerset violations (exclude Fanout/Stagger/XNet Short side): 0
# Overall Routing Time: 0:01:30
#
# Wiring Statistics ----------------- F:/wenjian/第十一章/自动布线\plane.dsn
# Nets 182 Connections 572 Unroutes 0
# Signal Layers 2 Power Layers 2
# Wire Junctions 204, at vias 129 Total Vias 582
# Percent Connected 99.65
# Manhattan Length 368494.0900 Horizontal 173949.3510 Vertical 194544.7390
# Routed Length 460378.7730 Horizontal 206112.3000 Vertical 255661.9540
# Ratio Actual / Manhattan 1.2494
# Unconnected Length 0.0000 Horizontal 0.0000 Vertical 0.0000
clean 2
# Current time = Mon May 04 10:57:39 2009
#
# VIA TOP BOTTOM
#
# TOP ------ VIA
# BOTTOM VIA ------
#
#
# Design Rules --------------------------------------------
# Via Grid 0.0100 with offset 0.0000
# Layer TOP Horz Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
# Layer BOTTOM Vert Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
#
# Wiring Statistics ----------------- F:/wenjian/第十一章/自动布线\plane.dsn
# Nets 182 Connections 572 Unroutes 0
# Signal Layers 2 Power Layers 2
# Wire Junctions 204, at vias 129 Total Vias 582
# Percent Connected 99.65
# Manhattan Length 368494.0900 Horizontal 173949.3510 Vertical 194544.7390
# Routed Length 460378.7730 Horizontal 206112.3000 Vertical 255661.9540
# Ratio Actual / Manhattan 1.2494
# Unconnected Length 0.0000 Horizontal 0.0000 Vertical 0.0000
# Start Clean Pass 1 of 2
# Routing 1023 wires.
# Total Conflicts: 4 (Cross: 1, Clear: 3, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 0
# Attempts 687 Successes 635 Failures 52 Vias 559
# Cpu Time = 0:00:06 Elapsed Time = 0:00:07
# End Pass 1 of 2
# Start Clean Pass 2 of 2
# Routing 1048 wires.
# 11 bend points have been removed.
# 35 bend points have been removed.
# Total Conflicts: 11 (Cross: 3, Clear: 8, Xtalk: 0, Length: 0, Polygon Clear: 0 )
# Total Unroutes: 0
# Attempts 696 Successes 644 Failures 52 Vias 562
# Cpu Time = 0:00:07 Elapsed Time = 0:00:07
# End Pass 2 of 2
# Cpu Time = 0:00:13 Elapsed Time = 0:00:15
#
# Design Rules --------------------------------------------
# Via Grid 0.0100 with offset 0.0000
# Layer TOP Horz Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
# Layer BOTTOM Vert Signal Wire Grid 0.0100 with offset 0.0000, Width= 6.0000, Clearance= 6.0000
# ROUTING HISTORY ================================================================
# Pass | Conflicts | | | | | |Red| CPU Time |
# Name |No.| Cross| Clear|Fail|Unrte| Vias|XTalk|Len.| % | Pass | Total |
#----------+---+------+------+----+-----+-----+-----+----+---+---------+---------|
# Route | 1| 999| 25| 0| 0| 284| 0| 0| 0| 0:00:04| 0:00:04|
# Route | 2| 528| 70| 21| 0| 410| 0| 0| 41| 0:00:10| 0:00:14|
# Route | 3| 245| 45| 18| 1| 465| 0| 0| 51| 0:00:12| 0:00:26|
# Route | 4| 82| 44| 11| 0| 486| 0| 0| 56| 0:00:11| 0:00:37|
# Route | 5| 46| 32| 15| 0| 533| 0| 0| 38| 0:00:13| 0:00:50|
# Route | 6| 16| 16| 3| 0| 575| 0| 0| 58| 0:00:06| 0:00:56|
# Route | 7| 18| 14| 1| 0| 571| 0| 0| 0| 0:00:03| 0:00:59|
# Route | 8| 5| 7| 0| 0| 572| 0| 0| 62| 0:00:02| 0:01:01|
# Route | 9| 10| 4| 0| 0| 577| 0| 0| 0| 0:00:03| 0:01:04|
# Route | 10| 3| 12| 0| 0| 583| 0| 0| 0| 0:00:02| 0:01:06|
# Route | 11| 1| 16| 0| 0| 595| 0| 0| 0| 0:00:02| 0:01:08|
# Route | 12| 3| 27| 0| 0| 590| 0| 0| 0| 0:00:03| 0:01:11|
# Route | 13| 3| 21| 1| 0| 588| 0| 0| 20| 0:00:01| 0:01:12|
# Route | 14| 3| 4| 1| 2| 586| 0| 0| 70| 0:00:04| 0:01:16|
# Route | 15| 5| 6| 0| 1| 585| 0| 0| 0| 0:00:01| 0:01:17|
# Route | 16| 1| 3| 0| 1| 586| 0| 0| 63| 0:00:03| 0:01:20|
# Route | 17| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:21|
# Route | 18| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:22|
# Route | 19| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:23|
# Route | 20| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:24|
# Route | 21| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:25|
# Route | 22| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:26|
# Route | 23| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:27|
# Route | 24| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:01| 0:01:28|
# Route | 25| 1| 3| 0| 0| 582| 0| 0| 0| 0:00:02| 0:01:30|
# Clean | 26| 1| 3| 52| 0| 559| 0| 0| | 0:00:06| 0:01:36|
# Clean | 27| 3| 8| 52| 0| 562| 0| 0| | 0:00:07| 0:01:43|
# Conflicts between polygon wires and fixed objects: 0
# Stub Violations: 0
# Net Order Violations: 0
# Diffpair Uncoupled Length Violations: 0
# Diffpair Phase Tolerance Violations: 0
# Total layerset violations: 0
# Total layerset violations (exclude Fanout/Stagger/XNet Short side): 0
# Overall Routing Time: 0:01:43
#
# Wiring Statistics ----------------- F:/wenjian/第十一章/自动布线\plane.dsn
# Nets 182 Connections 572 Unroutes 0
# Signal Layers 2 Power Layers 2
# Wire Junctions 207, at vias 134 Total Vias 562
# Percent Connected 99.30
# Manhattan Length 364704.8800 Horizontal 172832.5370 Vertical 191872.3430
# Routed Length 453626.2248 Horizontal 204878.3410 Vertical 250147.7230
# Ratio Actual / Manhattan 1.2438
# Unconnected Length 0.0000 Horizontal 0.0000 Vertical 0.0000
write routes (changed_only) (reset_changed) C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/#Taaaaak03820.tmp
# Routing Written to File C:/DOCUME~1/ADMINI~1/LOCALS~1/Temp/#Taaaaak03820.tmp
quit
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