example6.mdl

或许这个代码会对大家有用

Model {
  Name			  "example6"
  Version		  4.00
  SampleTimeColors	  off
  LibraryLinkDisplay	  "none"
  WideLines		  off
  ShowLineDimensions	  off
  ShowPortDataTypes	  off
  ShowStorageClass	  off
  ExecutionOrder	  off
  RecordCoverage	  off
  CovPath		  "/"
  CovSaveName		  "covdata"
  CovMetricSettings	  "dw"
  CovNameIncrementing	  off
  CovHtmlReporting	  on
  BlockNameDataTip	  off
  BlockParametersDataTip  off
  BlockDescriptionStringDataTip	off
  ToolBar		  on
  StatusBar		  on
  BrowserShowLibraryLinks off
  BrowserLookUnderMasks	  off
  Created		  "Sat Jan 11 16:50:37 2003"
  UpdateHistory		  "UpdateHistoryNever"
  ModifiedByFormat	  "%<Auto>"
  LastModifiedBy	  "lina"
  ModifiedDateFormat	  "%<Auto>"
  LastModifiedDate	  "Sun May 18 17:37:56 2003"
  ModelVersionFormat	  "1.%<AutoIncrement:43>"
  ConfigurationManager	  "None"
  SimParamPage		  "Solver"
  StartTime		  "0.0"
  StopTime		  "10"
  SolverMode		  "Auto"
  Solver		  "ode45"
  RelTol		  "1e-3"
  AbsTol		  "auto"
  Refine		  "1"
  MaxStep		  "auto"
  MinStep		  "auto"
  MaxNumMinSteps	  "-1"
  InitialStep		  "auto"
  FixedStep		  "auto"
  MaxOrder		  5
  OutputOption		  "RefineOutputTimes"
  OutputTimes		  "[]"
  LoadExternalInput	  off
  ExternalInput		  "[t, u]"
  SaveTime		  on
  TimeSaveName		  "tout"
  SaveState		  off
  StateSaveName		  "xout"
  SaveOutput		  on
  OutputSaveName	  "yout"
  LoadInitialState	  off
  InitialState		  "xInitial"
  SaveFinalState	  off
  FinalStateName	  "xFinal"
  SaveFormat		  "Array"
  LimitDataPoints	  on
  MaxDataPoints		  "1000"
  Decimation		  "1"
  AlgebraicLoopMsg	  "warning"
  MinStepSizeMsg	  "warning"
  UnconnectedInputMsg	  "warning"
  UnconnectedOutputMsg	  "warning"
  UnconnectedLineMsg	  "warning"
  InheritedTsInSrcMsg	  "warning"
  SingleTaskRateTransMsg  "none"
  MultiTaskRateTransMsg	  "error"
  IntegerOverflowMsg	  "warning"
  CheckForMatrixSingularity "none"
  UnnecessaryDatatypeConvMsg "none"
  Int32ToFloatConvMsg	  "warning"
  InvalidFcnCallConnMsg	  "error"
  SignalLabelMismatchMsg  "none"
  LinearizationMsg	  "none"
  VectorMatrixConversionMsg "none"
  SfunCompatibilityCheckMsg "none"
  BlockPriorityViolationMsg "warning"
  ArrayBoundsChecking	  "none"
  ConsistencyChecking	  "none"
  ZeroCross		  on
  Profile		  off
  SimulationMode	  "accelerator"
  RTWSystemTargetFile	  "grt.tlc"
  RTWInlineParameters	  off
  RTWRetainRTWFile	  off
  RTWTemplateMakefile	  "grt_default_tmf"
  RTWMakeCommand	  "make_rtw"
  RTWGenerateCodeOnly	  off
  TLCProfiler		  off
  TLCDebug		  off
  TLCCoverage		  off
  AccelSystemTargetFile	  "accel.tlc"
  AccelTemplateMakefile	  "accel_default_tmf"
  AccelMakeCommand	  "make_rtw"
  TryForcingSFcnDF	  off
  ExtModeMexFile	  "ext_comm"
  ExtModeBatchMode	  off
  ExtModeTrigType	  "manual"
  ExtModeTrigMode	  "normal"
  ExtModeTrigPort	  "1"
  ExtModeTrigElement	  "any"
  ExtModeTrigDuration	  1000
  ExtModeTrigHoldOff	  0
  ExtModeTrigDelay	  0
  ExtModeTrigDirection	  "rising"
  ExtModeTrigLevel	  0
  ExtModeArchiveMode	  "off"
  ExtModeAutoIncOneShot	  off
  ExtModeIncDirWhenArm	  off
  ExtModeAddSuffixToVar	  off
  ExtModeWriteAllDataToWs off
  ExtModeArmWhenConnect	  on
  ExtModeSkipDownloadWhenConnect off
  ExtModeLogAll		  on
  ExtModeAutoUpdateStatusClock on
  OptimizeBlockIOStorage  on
  BufferReuse		  on
  ParameterPooling	  on
  BlockReductionOpt	  on
  RTWExpressionDepthLimit 5
  BooleanDataType	  off
  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "Helvetica"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "example6"
    Location		    [257, 169, 862, 451]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "automatic"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "A4"
    PaperUnits		    "centimeters"
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Reference
      Name		      "AWGN\nChannel"
      Ports		      [1, 1]
      Position		      [355, 34, 435, 76]
      SourceBlock	      "commchan2/AWGN\nChannel"
      SourceType	      "AWGN Channel"
      seed		      "1237"
      noiseMode		      "Signal to noise ratio  (Es/No)"
      EsNodB		      "-1"
      SNRdB		      "10"
      Ps		      "1"
      Tsym		      "0.5"
      variance		      "1"
    }
    Block {
      BlockType		      Reference
      Name		      "BPSK Modulator\nBaseband"
      Ports		      [1, 1]
      Position		      [250, 31, 325, 79]
      SourceBlock	      "commdigbbndpm2/BPSK\nModulator\nBaseband"
      SourceType	      "BPSK Modulator Baseband"
      Ph		      "0"
      numSamp		      "1"
    }
    Block {
      BlockType		      Reference
      Name		      "Bernoulli Random\nBinary Generator"
      Ports		      [0, 1]
      Position		      [40, 32, 110, 78]
      SourceBlock	      "commsource2/Bernoulli Random\nBinary Generator"
      SourceType	      "Bernoulli Random Binary Generator"
      P			      "0.5"
      seed		      "1534"
      Ts		      "1"
      frameBased	      on
      sampPerFrame	      "3"
      orient		      off
    }
    Block {
      BlockType		      ComplexToRealImag
      Name		      "Complex to\nReal-Imag"
      Ports		      [1, 1]
      Position		      [385, 135, 445, 175]
      Orientation	      "left"
      NamePlacement	      "alternate"
      ShowName		      off
      Output		      "Real"
    }
    Block {
      BlockType		      Reference
      Name		      "Convolutional\nEncoder"
      Ports		      [1, 1]
      Position		      [145, 30, 220, 80]
      SourceBlock	      "commcnvcod2/Convolutional\nEncoder"
      SourceType	      "Convolutional Encoder"
      trellis		      "poly2trellis(7, [171 133])"
      reset		      "None"
    }
    Block {
      BlockType		      Display
      Name		      "Display"
      Ports		      [1]
      Position		      [40, 120, 140, 190]
      Orientation	      "left"
      Format		      "short"
      Decimation	      "1"
      Floating		      off
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Reference
      Name		      "Error Rate Calculation"
      Ports		      [2, 1]
      Position		      [160, 127, 250, 178]
      Orientation	      "left"
      SourceBlock	      "commsink2/Error Rate Calculation"
      SourceType	      "Error Rate Calculation"
      N			      "96"
      st_delay		      "0"
      cp_mode		      "Entire frame"
      subframe		      "[]"
      PMode		      "Port"
      WsName		      "ErrorVec"
      RsMode2		      off
      stop		      off
      numErr		      "100"
      maxBits		      "1e6"
    }
    Block {
      BlockType		      Reference
      Name		      "Viterbi Decoder"
      Ports		      [1, 1]
      Position		      [280, 130, 360, 180]
      Orientation	      "left"
      SourceBlock	      "commcnvcod2/Viterbi Decoder"
      SourceType	      "Viterbi Decoder"
      trellis		      "poly2trellis(7, [171 133])"
      dectype		      "Unquantized"
      nsdecb		      "4"
      tbdepth		      "96"
      opmode		      "Continuous"
      reset		      off
    }
    Line {
      SrcBlock		      "Bernoulli Random\nBinary Generator"
      SrcPort		      1
      Points		      [5, 0]
      Branch {
	DstBlock		"Convolutional\nEncoder"
	DstPort			1
      }
      Branch {
	Points			[0, 55; 150, 0; 0, 30]
	DstBlock		"Error Rate Calculation"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Convolutional\nEncoder"
      SrcPort		      1
      DstBlock		      "BPSK Modulator\nBaseband"
      DstPort		      1
    }
    Line {
      SrcBlock		      "BPSK Modulator\nBaseband"
      SrcPort		      1
      DstBlock		      "AWGN\nChannel"
      DstPort		      1
    }
    Line {
      SrcBlock		      "AWGN\nChannel"
      SrcPort		      1
      Points		      [20, 0]
      DstBlock		      "Complex to\nReal-Imag"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Complex to\nReal-Imag"
      SrcPort		      1
      DstBlock		      "Viterbi Decoder"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Viterbi Decoder"
      SrcPort		      1
      Points		      [-5, 0; 0, 10]
      DstBlock		      "Error Rate Calculation"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Error Rate Calculation"
      SrcPort		      1
      DstBlock		      "Display"
      DstPort		      1
    }
  }
}