xing.cr.mti

&#65279 The purpose of this lab is to introduce the concept of FSMs with a datapath, and to stud

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Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package package_microassemblycode
-- Loading package std_logic_arith
-- Compiling entity videocomposer
-- Compiling architecture composite of videocomposer

} {} {}} D:/vhdl/xx/tb_videoComposer_93.vhd {1 {vcom -work work -2002 -explicit D:/vhdl/xx/tb_videoComposer_93.vhd
Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package std_logic_arith
-- Loading package textio
-- Loading package package_microassemblycode
-- Compiling entity tb_videocomposer_93
-- Compiling architecture tb_behaviour of tb_videocomposer_93
-- Loading package std_logic_signed

} {} {}} D:/vhdl/xx/single_port_rom.vhd {1 {vcom -work work -2002 -explicit D:/vhdl/xx/single_port_rom.vhd
Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package lpm_components
-- Compiling entity single_port_rom
-- Compiling architecture syn of single_port_rom

} {} {}} D:/vhdl/xx/dataPath.vhd {1 {vcom -work work -2002 -explicit D:/vhdl/xx/dataPath.vhd
Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package package_microassemblycode
-- Compiling entity datapath
-- Compiling architecture behaviour of datapath

} {} {}} D:/vhdl/xx/package_microAssemblyCode.vhd {1 {vcom -work work -2002 -explicit D:/vhdl/xx/package_microAssemblyCode.vhd
Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
-- Loading package standard
-- Loading package std_logic_1164
-- Compiling package package_microassemblycode

} {} {}} D:/vhdl/xx/videoComposer_fpga.vhd {1 {vcom -work work -2002 -explicit D:/vhdl/xx/videoComposer_fpga.vhd
Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package std_logic_arith
-- Loading package std_logic_signed
-- Loading package package_microassemblycode
-- Compiling entity videocomposer_fpga
-- Compiling architecture behaviour of videocomposer_fpga

} {} {}} D:/vhdl/xx/shifter.vhd {1 {vcom -work work -2002 -explicit D:/vhdl/xx/shifter.vhd
Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
-- Loading package standard
-- Loading package std_logic_1164
-- Compiling entity shifter
-- Compiling architecture behaviour of shifter

} {} {}} D:/vhdl/xx/selector.vhd {1 {vcom -work work -2002 -explicit D:/vhdl/xx/selector.vhd
Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
-- Loading package standard
-- Loading package std_logic_1164
-- Compiling entity selector
-- Compiling architecture behaviour of selector

} {} {}} D:/vhdl/xx/regFile.vhd {1 {vcom -work work -2002 -explicit D:/vhdl/xx/regFile.vhd
Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package std_logic_arith
-- Loading package std_logic_signed
-- Compiling entity regfile
-- Compiling architecture behaviour of regfile

} {} {}} D:/vhdl/xx/alu.vhd {1 {vcom -work work -2002 -explicit D:/vhdl/xx/alu.vhd
Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
-- Loading package standard
-- Loading package std_logic_1164
-- Loading package std_logic_arith
-- Compiling entity alu
-- Compiling architecture behaviour of alu

} {} {}}