strata32.c

2440通过简易JTAG烧写LOADER的源码

    _WR(targetAddress, 0x00200020); // Block Erase, First Bus Cycle, targetAddress is the address withint the block
    _WR(targetAddress, 0x00d000d0); // Block Erase, Second Bus Cycle, targetAddress is the address withint the block
    
    //_RESET();
    _WR(targetAddress, 0x00700070); // Read Status Register, First Bus Cycle, targetAddress is any valid address within the device
    ReadStatus=_RD(targetAddress);  // Read Status Register, Second Bus Cycle, targetAddress is any valid address within the device
    bSR7=ReadStatus & (1<<7);       // lower 16-bit 8MB Strata
    bSR7_2=ReadStatus & (1<<(7+16));// higher 16-bit 8MB Strata
    
	while(!bSR7 || !bSR7_2) 
    {
        _WR(targetAddress, 0x00700070);
        ReadStatus=_RD(targetAddress);
        bSR7=ReadStatus & (1<<7);
        bSR7_2=ReadStatus & (1<<(7+16));
//      printf("wait !!\n");
    }

    _WR(targetAddress, 0x00700070); // When the block erase is complete, status register bit SR.5 should be checked. 
                    // If a block erase error is detected, the status register should be cleared before
                    // system software attempts correct actions.
    ReadStatus=_RD(targetAddress);  
    
	bSR5=ReadStatus & (1<<5);           // lower 16-bit 8MB Strata 
    bSR5_2=ReadStatus & (1<<(5+16));    // higher 16-bit 8MB Strata 
    
	if (bSR5==0 && bSR5_2==0) 
    {
        printf("Block @%xh Erase O.K. \n",targetAddress);
    } 
    else 
    {
        //printf("Error in Block Erasure!!\n");
        _WR(targetAddress, 0x00500050); // Clear Status Register
        error_erase=1;                  // But not major, is it casual ?
    }

    _RESET();   // write 0xffh(_RESET()) after the last opoeration to reset the device to read array mode.
}
*/

//yczhao HHTECH
void Strata_EraseSector(int targetAddress) 
{
    unsigned long ReadStatus;
    unsigned long bSR5;     // Erase and Clear Lock-bits Status, lower 16bit, 8MB Intel Strate Flash ROM
    unsigned long bSR5_2;   // Erase and Clear Lock-bits Status, higher 16bit, 8MB Intel Strate Flash ROM
    unsigned long bSR7;     // Write State Machine Status, lower 16bit, 8MB Intel Strate Flash ROM
    unsigned long bSR7_2;   // Write State Machine Status, higher 16bit, 8MB Intel Strate Flash ROM
    //_RESET();
//  _WR(targetAddress, 0x00200020);
//  _WR(targetAddress, 0x00d000d0);
    _WR(targetAddress, 0x0020); // Block Erase, First Bus Cycle, targetAddress is the address withint the block
    _WR(targetAddress, 0x00d0); // Block Erase, Second Bus Cycle, targetAddress is the address withint the block
    
    //_RESET();
    _WR(targetAddress, 0x0070); // Read Status Register, First Bus Cycle, targetAddress is any valid address within the device
    ReadStatus=_RD(targetAddress);  // Read Status Register, Second Bus Cycle, targetAddress is any valid address within the device
    bSR7=ReadStatus & (1<<7);       // lower 16-bit 8MB Strata
//  bSR7_2=ReadStatus & (1<<(7+16));// higher 16-bit 8MB Strata
    while(!bSR7 ) 
    {
        _WR(targetAddress, 0x0070);
        ReadStatus=_RD(targetAddress);
        bSR7=ReadStatus & (1<<7);
//        bSR7_2=ReadStatus & (1<<(7+16));
//      printf("wait !!\n");
    }

    _WR(targetAddress, 0x0070); // When the block erase is complete, status register bit SR.5 should be checked. 
                    // If a block erase error is detected, the status register should be cleared before
                    // system software attempts correct actions.
    ReadStatus=_RD(targetAddress);  
    bSR5=ReadStatus & (1<<5);           // lower 16-bit 8MB Strata 
//    bSR5_2=ReadStatus & (1<<(5+16));    // higher 16-bit 8MB Strata 
    if (bSR5==0) 
    {
        printf("Block @%xh Erase O.K. \n",targetAddress);
    } 
    else 
    {
        //printf("Error in Block Erasure!!\n");
        _WR(targetAddress, 0x0050); // Clear Status Register
        error_erase=1;                  // But not major, is it casual ?
    }

    _RESET();   // write 0xffh(_RESET()) after the last opoeration to reset the device to read array mode.
}


//==========================================================================================
int Strata_BlankCheck(int targetAddr,int targetSize) 
{
    int i,j;
    for (i=0; i<targetSize; i+=4) 
    {
        j=_RD(i+targetAddr);

        if (j!=0xffff)      // In erasure it changes all block dta to 0xff
        {
            printf("E : %x = %x\n", (i+targetAddr), j);
            return 0;
        }
    }
    return 1;
}

/*
//==========================================================================================
int Strata_ProgFlash(U32 realAddr,U32 data) 
{
    volatile U32 *ptargetAddr;
    unsigned long ReadStatus;
    unsigned long bSR4;    // Erase and Clear Lock-bits Status, lower 16bit, 8MB Intel Strate Flash ROM
    unsigned long bSR4_2;  // Erase and Clear Lock-bits Status, higher 16bit, 8MB Intel Strate Flash ROM
    unsigned long bSR7;    // Write State Machine Status, lower 16bit, 8MB Intel Strate Flash ROM
    unsigned long bSR7_2;  // Write State Machine Status, higher 16bit, 8MB Intel Strate Flash ROM

    //ptargetAddr = (volatile U32 *)realAddr;
    //_RESET();

    _WR(realAddr, 0x00400040);  // realAddr is any valid adress within the device
                                // Word/Byte Program(or 0x00100010 can be used)
    //*ptargetAddr=data;          // 32 bit data
    _WR(realAddr, data);

#if 1
    //_RESET();
    _WR(realAddr, 0x00700070);  // Read Status Register
    ReadStatus=_RD(realAddr);   // realAddr is any valid address within the device
    bSR7=ReadStatus & (1<<7);
    bSR7_2=ReadStatus & (1<<(7+16));
    while(!bSR7 || !bSR7_2) 
    {
        // _RESET();
        _WR(realAddr, 0x00700070);        // Read Status Register
        ReadStatus=_RD(realAddr);
        bSR7=ReadStatus & (1<<7);
        bSR7_2=ReadStatus & (1<<(7+16));
    }
    
    _WR(realAddr, 0x00700070); 
    ReadStatus=_RD(realAddr);             // Real Status Register
    bSR4=ReadStatus & (1<<4);
    bSR4_2=ReadStatus & (1<<(4+16));
    
    if (bSR4==0 && bSR4_2==0) 
    {
        //printf("Successful Program!!\n");
    } 
    else 
    {
        //printf("Error Program!!\n");
        _WR(realAddr, 0x00500050);          // Clear Status Register
        error_program=1;                    // But not major, is it casual ?
    }
#endif

#if !FAST_ROM_PROGRAM
    _RESET();
#endif
    return 0;
}
*/

/*yczhao HHTECH*/
int Strata_ProgFlash(U32 realAddr,U32 data) 
{
    volatile U32 *ptargetAddr;
    unsigned long ReadStatus;
    unsigned long bSR4;    // Erase and Clear Lock-bits Status, lower 16bit, 8MB Intel Strate Flash ROM
    unsigned long bSR4_2;  // Erase and Clear Lock-bits Status, higher 16bit, 8MB Intel Strate Flash ROM
    unsigned long bSR7;    // Write State Machine Status, lower 16bit, 8MB Intel Strate Flash ROM
    unsigned long bSR7_2;  // Write State Machine Status, higher 16bit, 8MB Intel Strate Flash ROM

    //ptargetAddr = (volatile U32 *)realAddr;
    //_RESET();

    _WR(realAddr, 0x0040);  // realAddr is any valid adress within the device
                                // Word/Byte Program(or 0x00100010 can be used)
    //*ptargetAddr=data;          // 32 bit data
    _WR(realAddr, data);

#if 0
    //_RESET();
    _WR(realAddr, 0x0070);  // Read Status Register
    ReadStatus=_RD(realAddr);   // realAddr is any valid address within the device
    bSR7=ReadStatus & (1<<7);
//    bSR7_2=ReadStatus & (1<<(7+16));
    while(!bSR7) 
    {
        // _RESET();
        _WR(realAddr, 0x0070);        // Read Status Register
        ReadStatus=_RD(realAddr);
        bSR7=ReadStatus & (1<<7);
//        bSR7_2=ReadStatus & (1<<(7+16));
    }
    
    _WR(realAddr, 0x0070); 
    ReadStatus=_RD(realAddr);             // Real Status Register
    bSR4=ReadStatus & (1<<4);
//    bSR4_2=ReadStatus & (1<<(4+16));
    
    if (bSR4==0) 
    {
        //printf("Successful Program!!\n");
    } 
    else 
    {
        //printf("Error Program!!\n");
        _WR(realAddr, 0x0050);          // Clear Status Register
        error_program=1;                    // But not major, is it casual ?
    }
#endif

    _RESET();
    return 0;
}