warmboot.c

BIOS emulator and interface to Realmode X86 Emulator Library Can emulate a PCI Graphic Controller V

/****************************************************************************
*
*	     				 BIOS emulator and interface
*					   to Realmode X86 Emulator Library
*
*            	Copyright (C) 1996-1999 SciTech Software, Inc.
*
*  ========================================================================
*
*  Permission to use, copy, modify, distribute, and sell this software and
*  its documentation for any purpose is hereby granted without fee,
*  provided that the above copyright notice appear in all copies and that
*  both that copyright notice and this permission notice appear in
*  supporting documentation, and that the name of the authors not be used
*  in advertising or publicity pertaining to distribution of the software
*  without specific, written prior permission.  The authors makes no
*  representations about the suitability of this software for any purpose.
*  It is provided "as is" without express or implied warranty.
*
*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
*  PERFORMANCE OF THIS SOFTWARE.
*
*  ========================================================================
*
* Language:		ANSI C
* Environment:	Any
* Developer:    Kendall Bennett
*
* Description:	Module to implement warm booting of all PCI/AGP controllers
*				on the bus. We use the x86 real mode emulator to run the
*				BIOS on the primary and secondary controllers to bring
*				the cards up.
*
****************************************************************************/

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <stdarg.h>
#include "biosemu.h"
#ifndef	_MAX_PATH
#define	_MAX_PATH 256
#endif

/*------------------------- Global Variables ------------------------------*/

static PCIDeviceInfo	PCI[MAX_PCI_DEVICES];
static int				NumPCI = -1;
static int				BridgeIndex[MAX_PCI_DEVICES] = {0};
static int				NumBridges;
static PCIBridgeInfo	*AGPBridge = NULL;
static int				DeviceIndex[MAX_PCI_DEVICES] = {0};
static int				NumDevices;
static u32				debugFlags = 0;
static BE_VGAInfo		VGAInfo[MAX_PCI_DEVICES] = {{0}};
static ibool			useV86 = false;
static ibool			forcePost = false;

/* Length of the BIOS image */

#define	MAX_BIOSLEN			(64 * 1024L)
#define	FINAL_BIOSLEN		(32 * 1024L)

/* Macro to determine if the VGA is enabled and responding */

#define VGA_NOT_ACTIVE()	(forcePost || (PM_inpb(0x3CC) == 0xFF) || ((PM_inpb(0x3CC) & 0x2) == 0))

#define	ENABLE_DEVICE(device)	\
	PCI_writePCIRegB(0x4,PCI[DeviceIndex[device]].Command | 0x7,device)

#define	DISABLE_DEVICE(device)	\
	PCI_writePCIRegB(0x4,0,device)

/* Macros to enable and disable AGP VGA resources */

#define	ENABLE_AGP_VGA()	\
	PCI_accessReg(0x3E,AGPBridge->BridgeControl | 0x8,PCI_WRITE_WORD,(PCIDeviceInfo*)AGPBridge)

#define	DISABLE_AGP_VGA()	\
	PCI_accessReg(0x3E,AGPBridge->BridgeControl & ~0x8,PCI_WRITE_WORD,(PCIDeviceInfo*)AGPBridge)

#define	RESTORE_AGP_VGA()	\
	PCI_accessReg(0x3E,AGPBridge->BridgeControl,PCI_WRITE_WORD,(PCIDeviceInfo*)AGPBridge)

/*-------------------------- Implementation -------------------------------*/

/****************************************************************************
RETURNS:
The address to use to map the secondary BIOS (PCI/AGP devices)

REMARKS:
Searches all the PCI base address registers for the device looking for a
memory mapping that is large enough to hold our ROM BIOS. We usually end up
finding the framebuffer mapping (usually BAR 0x10), and we use this mapping
to map the BIOS for the device into. We use a mapping that is already
assigned to the device to ensure the memory range will be passed through
by any PCI->PCI or AGP->PCI bridge that may be present.

NOTE: Usually this function is only used for AGP devices, but it may be
	  used for PCI devices that have already been POST'ed and the BIOS
	  ROM base address has been zero'ed out.
****************************************************************************/
static ulong PCI_findBIOSAddr(
	int device)
{
	ulong   base,size;
	int		bar;

	for (bar = 0x10; bar <= 0x14; bar++) {
		base = PCI_readPCIRegL(bar,device) & ~0xFF;
		if (!(base & 0x1)) {
			PCI_writePCIRegL(bar,0xFFFFFFFF,device);
			size = PCI_readPCIRegL(bar,device) & ~0xFF;
			size = ~size+1;
			PCI_writePCIRegL(bar,0,device);
			if (size >= MAX_BIOSLEN)
				return base;
			}
		}
	return 0;
}

/****************************************************************************
REMARKS:
Re-writes the PCI base address registers for the secondary PCI controller
with the values from our initial PCI bus enumeration. This fixes up the
values after we have POST'ed the secondary display controller BIOS, which
may have incorrectly re-programmed the base registers the same as the
primary display controller (the case for identical S3 cards).
****************************************************************************/
static void _PCI_fixupSecondaryBARs(void)
{
	int i;

	for (i = 0; i < NumDevices; i++) {
		PCI_writePCIRegL(0x10,PCI[DeviceIndex[i]].BaseAddress10,i);
		PCI_writePCIRegL(0x14,PCI[DeviceIndex[i]].BaseAddress14,i);
		PCI_writePCIRegL(0x18,PCI[DeviceIndex[i]].BaseAddress18,i);
		PCI_writePCIRegL(0x1C,PCI[DeviceIndex[i]].BaseAddress1C,i);
		PCI_writePCIRegL(0x20,PCI[DeviceIndex[i]].BaseAddress20,i);
		PCI_writePCIRegL(0x24,PCI[DeviceIndex[i]].BaseAddress24,i);
		}
}

/****************************************************************************
RETURNS:
True if successfully initialised, false if not.

REMARKS:
This function executes the BIOS POST code on the controller. We assume that
at this stage the controller has its I/O and memory space enabled and
that all other controllers are in a disabled state.
****************************************************************************/
static void PCI_doBIOSPOST(
	int device,
	ulong BIOSPhysAddr,
	void *mappedBIOS,
	ulong BIOSLen)
{
	RMREGS			regs;
	RMSREGS			sregs;

	// Determine the value to store in AX for BIOS POST
	regs.x.ax = (u16)(PCI[DeviceIndex[device]].slot.i >> 8);
	if (useV86) {
		// Post the BIOS using the PM functions (ie: v86 mode on Linux)
		if (!PM_doBIOSPOST(regs.x.ax,BIOSPhysAddr,mappedBIOS,BIOSLen)) {
			// If the PM function fails, this probably means are we are on
			// DOS and can't re-map the real mode 0xC0000 region. In thise
			// case if the device is the primary, we can use the real
			// BIOS at 0xC0000 directly.
			if (device == 0)
				PM_doBIOSPOST(regs.x.ax,0xC0000,mappedBIOS,BIOSLen);
			}
		}
	else {
		// Setup the X86 emulator for the VGA BIOS
		BE_setVGA(&VGAInfo[device]);

		// Execute the BIOS POST code
		BE_callRealMode(0xC000,0x0003,&regs,&sregs);

		// Cleanup and exit
		BE_getVGA(&VGAInfo[device]);
		}
}

/****************************************************************************
RETURNS:
True if successfully initialised, false if not.

REMARKS:
Loads and POST's the secondary controllers BIOS, directly from the BIOS
image we can extract over the PCI bus.
****************************************************************************/
static ibool PCI_postControllers(void)
{
	int		device;
	ulong	BIOSImageLen,mappedBIOSPhys;
	uchar	*mappedBIOS,*copyOfBIOS;
	char	filename[_MAX_PATH];
	FILE	*f;

	// Disable the primary display controller and AGP VGA pass-through
	DISABLE_DEVICE(0);
	if (AGPBridge)
		DISABLE_AGP_VGA();

	// Now POST all the secondary controllers
	for (device = 0; device < NumDevices; device++) {
		// Skip the device if it is not enabled (probably an ISA device)
		if (DeviceIndex[device] == -1)
			continue;

		// Enable secondary display controller. If the secondary controller
		// is on the AGP bus, then enable VGA resources for the AGP device.
		ENABLE_DEVICE(device);
		if (AGPBridge && AGPBridge->SecondayBusNumber == PCI[DeviceIndex[device]].slot.p.Bus)
			ENABLE_AGP_VGA();

		// Check if the controller has already been POST'ed
		if (VGA_NOT_ACTIVE()) {
			// Find a viable place to map the secondary PCI BIOS image and map it
			printk("Device %d not enabled, so attempting warm boot it\n", device);

			// For AGP devices (and PCI devices that do have the ROM base
			// address zero'ed out) we have to map the BIOS to a location
			// that is passed by the AGP bridge to the bus. Some AGP devices
			// have the ROM base address already set up for us, and some
			// do not (we map to one of the existing BAR locations in
			// this case).
			mappedBIOS = NULL;
			if (PCI[DeviceIndex[device]].ROMBaseAddress != 0)
				mappedBIOSPhys = PCI[DeviceIndex[device]].ROMBaseAddress & ~0xF;
			else
				mappedBIOSPhys = PCI_findBIOSAddr(device);
			printk("Mapping BIOS image to 0x%08X\n", mappedBIOSPhys);
			mappedBIOS = PM_mapPhysicalAddr(mappedBIOSPhys,MAX_BIOSLEN-1,false);
			PCI_writePCIRegL(0x30,mappedBIOSPhys | 0x1,device);
			BIOSImageLen = mappedBIOS[2] * 512;
			if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL)
				return false;
			memcpy(copyOfBIOS,mappedBIOS,BIOSImageLen);
			PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);

			// Allocate memory to store copy of BIOS from secondary controllers
			VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
			VGAInfo[device].BIOSImage = copyOfBIOS;
			VGAInfo[device].BIOSImageLen = BIOSImageLen;

			// Restore device mappings
			PCI_writePCIRegL(0x30,PCI[DeviceIndex[device]].ROMBaseAddress,device);
			PCI_writePCIRegL(0x10,PCI[DeviceIndex[device]].BaseAddress10,device);
			PCI_writePCIRegL(0x14,PCI[DeviceIndex[device]].BaseAddress14,device);

			// Now execute the BIOS POST for the device
			if (copyOfBIOS[0] == 0x55 && copyOfBIOS[1] == 0xAA) {
				printk("Executing BIOS POST for controller.\n");
				PCI_doBIOSPOST(device,mappedBIOSPhys,copyOfBIOS,BIOSImageLen);
				}

			// Reset the size of the BIOS image to the final size
			VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;

			// Save the BIOS and interrupt vector information to disk
			sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
			if ((f = fopen(filename,"wb")) != NULL) {
				fwrite(copyOfBIOS,1,FINAL_BIOSLEN,f);
				fwrite(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
				fclose(f);
				}
			}
		else {
			// Allocate memory to store copy of BIOS from secondary controllers
			if ((copyOfBIOS = malloc(FINAL_BIOSLEN)) == NULL)
				return false;
			VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
			VGAInfo[device].BIOSImage = copyOfBIOS;
			VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;

			// Load the BIOS and interrupt vector information from disk