laczipmixer\mc9s12d64equ.inc

freescale的资料

PWMCNT3:    equ   $AF         ;PWM channel counter register

PWMCNT4:    equ   $B0         ;PWM channel counter register

PWMCNT5:    equ   $B1         ;PWM channel counter register

PWMCNT6:    equ   $B2         ;PWM channel counter register

PWMCNT7:    equ   $B3         ;PWM channel counter register

PWMPER0:    equ   $B4         ;PWM channel period register

PWMPER1:    equ   $B5         ;PWM channel period register

PWMPER2:    equ   $B6         ;PWM channel period register

PWMPER3:    equ   $B7         ;PWM channel period register

PWMPER4:    equ   $B8         ;PWM channel period register

PWMPER5:    equ   $B9         ;PWM channel period register

PWMPER6:    equ   $BA         ;PWM channel period register

PWMPER7:    equ   $BB         ;PWM channel period register

PWMDTY0:    equ   $BC         ;PWM channel duty register

PWMDTY1:    equ   $BD         ;PWM channel duty register

PWMDTY2:    equ   $BE         ;PWM channel duty register

PWMDTY3:    equ   $BF         ;PWM channel duty register

PWMDTY4:    equ   $C0         ;PWM channel duty register

PWMDTY5:    equ   $C1         ;PWM channel duty register

PWMDTY6:    equ   $C2         ;PWM channel duty register

PWMDTY7:    equ   $C3         ;PWM channel duty register

PWMSDN:     equ   $C4         ;PWM shutdown register
;
PWMIF:      equ   %10000000   ;PWM interrupt flag
PWMIE:      equ   %01000000   ;PWM interrupt enable
PWMRSTRT:   equ   %00100000   ;PWM restart
PWMLVL:     equ   %00010000   ;PWM shutdown output level
PWM7IN:     equ   %00000100   ;PWM channel 7 input status
PWM7INL:    equ   %00000010   ;PWM shtdwn active input lvl ch 7
PWM7ENA:    equ   %00000001   ;PWM emergency shutdown enable

; $C5 to $C7 reserved



;****  Serial Communication Interface 0 (SCI0V2)  *******************************************
;*
SCI0BDH:    equ   $C8         ;SCI baud rate registers
;
SBR12:      equ   %00010000   ;SCI baud rate bit
SBR11:      equ   %00001000   ;SCI baud rate bit
SBR10:      equ   %00000100   ;SCI baud rate bit
SBR9:       equ   %00000010   ;SCI baud rate bit
SBR8:       equ   %00000001   ;SCI baud rate bit

SCI0BDL:    equ   $C9         ;SCI baud rate registers
;
SBR7:       equ   %10000000   ;SCI baud rate bit
SBR6:       equ   %01000000   ;SCI baud rate bit
SBR5:       equ   %00100000   ;SCI baud rate bit
SBR4:       equ   %00010000   ;SCI baud rate bit
SBR3:       equ   %00001000   ;SCI baud rate bit
SBR2:       equ   %00000100   ;SCI baud rate bit
SBR1:       equ   %00000010   ;SCI baud rate bit
SBR0:       equ   %00000001   ;SCI baud rate bit

SCI0CR1:    equ   $CA         ;SCI control register 1
;
LOOPS:      equ   %10000000   ;loop select bit
SCISWAI:    equ   %01000000   ;SCI stop in wait mode bit
RSRC:       equ   %00100000   ;receiver source bit
M:          equ   %00010000   ;data format mode bit
WAKE:       equ   %00001000   ;wakeup condition bit
ILT:        equ   %00000100   ;idle line type bit
PE:         equ   %00000010   ;parity enable bit
PT:         equ   %00000001   ;parity type bit

SCI0CR2:    equ   $CB         ;SCI control register 2
;
TIE:        equ   %10000000   ;transmitter interrupt enable bit
TCIE:       equ   %01000000   ;transmission complete INT enable
RIE:        equ   %00100000   ;receiver full interrupt enable bit
ILIE:       equ   %00010000   ;idle line interrupt enable bit
TE:         equ   %00001000   ;transmitter enable bit
RE:         equ   %00000100   ;receiver enable bit
RWU:        equ   %00000010   ;receiver wakeup bit
SBK:        equ   %00000001   ;send break bit

SCI0SR1:    equ   $CC         ;SCI status register 1
;
TDRE:       equ   %10000000   ;transmit data register empty flag
TC:         equ   %01000000   ;transmit complete flag
RDRF:       equ   %00100000   ;receive data register full flag
IDLE:       equ   %00010000   ;idle line flag
OR:         equ   %00001000   ;overrun flag
NF:         equ   %00000100   ;noise flag
FE:         equ   %00000010   ;framing error flag
PF:         equ   %00000001   ;parity error flag

SCI0SR2:    equ   $CD         ;SCI status register 2
;
BRK13:      equ   %00000100   ;break transmit character length
TXDIR:      equ   %00000010   ;xmitter pin data dir sngl-wire mode
RAF:        equ   %00000001   ;receiver active flag

SCI0DRH:    equ   $CE         ;SCI data register
;
R8:         equ   %10000000   ;received bit 8
T8:         equ   %01000000   ;transmit bit 8

SCI0DRL:    equ   $CF         ;SCI data register
; read-only Rx data buffer 
R7:         equ   %10000000   ;received bit 7
R6:         equ   %01000000   ;received bit 6
R5:         equ   %00100000   ;received bit 5
R4:         equ   %00010000   ;received bit 4
R3:         equ   %00001000   ;received bit 3
R2:         equ   %00000100   ;received bit 2
R1:         equ   %00000010   ;received bit 1
R0:         equ   %00000001   ;received bit 0
; write-only Rx data buffer
T7:         equ   %10000000   ;transmit bit 7
T6:         equ   %01000000   ;transmit bit 6
T5:         equ   %00100000   ;transmit bit 5
T4:         equ   %00010000   ;transmit bit 4
T3:         equ   %00001000   ;transmit bit 3
T2:         equ   %00000100   ;transmit bit 2
T1:         equ   %00000010   ;transmit bit 1
T0:         equ   %00000001   ;transmit bit 0



;****  Serial Communication Interface 1 (SCI1V2)  *******************************************
;*
SCI1BDH:    equ   $D0         ;SCI baud rate registers

SCI1BDL:    equ   $D1         ;SCI baud rate registers

SCI1CR1:    equ   $D2         ;SCI control register 1

SCI1CR2:    equ   $D3         ;SCI control register 2

SCI1SR1:    equ   $D4         ;SCI status register 1

SCI1SR2:    equ   $D5         ;SCI status register 2

SCI1DRH:    equ   $D6         ;SCI data register

SCI1DRL:    equ   $D7         ;SCI data register

; SCI1V2 registers have the same bit definitions as SCI0V2, see above



;****  Serial Peripheral Interface (SPI0V2)  ************************************************
;*
SPI0CR1:    equ   $D8         ;SPI control register 1
;
SPIE:       equ   %10000000   ;SPI interrupt enable bit
SPE:        equ   %01000000   ;SPI system enable bit
SPTIE:      equ   %00100000   ;SPI transmit interrupt enable
MSTR:       equ   %00010000   ;SPI master/slave mode select bit
CPOL:       equ   %00001000   ;SPI clock polarity bit
CPHA:       equ   %00000100   ;SPI clock phase bit
SSOE:       equ   %00000010   ;slave select output enable
LSBFE:      equ   %00000001   ;SPI LSB-first enable

SPI0CR2:    equ   $D9         ;SPI control register 2
;
MODFEN:     equ   %00010000   ;mode fault enable bit
BIDIROE:    equ   %00001000   ;OE in bidirectional mode of oper
SPISWAI:    equ   %00000010   ;SPI stop in wait mode bit
SPC0:       equ   %00000001   ;serial pin control bit 0

SPI0BR:     equ   $DA         ;SPI baud rate register
;
SPPR2:      equ   %01000000   ;SPI baud rate preselection bit
SPPR1:      equ   %00100000   ;SPI baud rate preselection bit
SPPR0:      equ   %00010000   ;SPI baud rate preselection bit
SPR2:       equ   %00000100   ;SPI baud rate selection bit
SPR1:       equ   %00000010   ;SPI baud rate selection bit
SPR0:       equ   %00000001   ;SPI baud rate selection bit

SPI0SR:     equ   $DB         ;SPI status register
;
SPIF:       equ   %10000000   ;SPIF interrupt flag
SPTEF:      equ   %00100000   ;SPI transmit empty interrupt flag
MODF:       equ   %00010000   ;mode fault flag

; $DC reserved

SPI0DR:     equ   $DD         ;SPI data register

; $DE to $DF reserved



;****  Inter IC Bus (IICV2)  ****************************************************************
;*
IBAD:       equ   $E0         ;IIC address register
;
ADR7:       equ   %10000000   ;slave address
ADR6:       equ   %01000000   ;slave address
ADR5:       equ   %00100000   ;slave address
ADR4:       equ   %00010000   ;slave address
; ADR3, ADR2, and ADR1, are defined in the ITCR register

IBFD:       equ   $E1         ;IIC frequency divider register
;
IBC7:       equ   %10000000   ;I-bus clock rate 7
IBC6:       equ   %01000000   ;I-bus clock rate 6
IBC5:       equ   %00100000   ;I-bus clock rate 5
IBC4:       equ   %00010000   ;I-bus clock rate 4
IBC3:       equ   %00001000   ;I-bus clock rate 3
IBC2:       equ   %00000100   ;I-bus clock rate 2
IBC1:       equ   %00000010   ;I-bus clock rate 1
IBC0:       equ   %00000001   ;I-bus clock rate 0

IBCR:       equ   $E2         ;IIC control register
;
IBEN:       equ   %10000000   ;I-bus enable
IBIE:       equ   %01000000   ;I-bus interrupt enable
MSSL:       equ   %00100000   ;master/slave mode select bit
TXRX:       equ   %00010000   ;transmit/receive mode select bit
TXAK:       equ   %00001000   ;transmit acknowledge enable
RSTA:       equ   %00000100   ;repeat start
IBSWAI:     equ   %00000001   ;I-bus interface stop in WAIT mode

IBSR:       equ   $E3         ;IIC status register
;
TCF:        equ   %10000000   ;data transferring bit
IAAS:       equ   %01000000   ;addressed as a slave bit
IBB:        equ   %00100000   ;bus busy bit
IBAL:       equ   %00010000   ;arbitration lost
SRW:        equ   %00000100   ;slave read/write
IBIF:       equ   %00000010   ;I-bus interrupt
RXAK:       equ   %00000001   ;received acknowledge

IBDR:       equ   $E4         ;IIC data I/O register

; $E5 to $E7 reserved



; $E8 to $EF reserved



; $F0 to $FF reserved



;****  Flash Control Register (FTS64KV1)  ***************************************************
;*
FCLKDIV:    equ   $100        ;flash clock divider register
;
FDIVLD:     equ   %10000000   ;clock divider loaded
PRDIV8:     equ   %01000000   ;enable prescaler by 8
FDIV5:      equ   %00100000   ;clock divider bit
FDIV4:      equ   %00010000   ;clock divider bit
FDIV3:      equ   %00001000   ;clock divider bit
FDIV2:      equ   %00000100   ;clock divider bit
FDIV1:      equ   %00000010   ;clock divider bit
FDIV0:      equ   %00000001   ;clock divider bit

FSEC:       equ   $101        ;flash security register
;
KEYEN:      equ   %10000000   ;enable backdoor key to security
NV6:        equ   %01000000   ;non volatile flag bit 
; NV6 bit appears in FPROT register also
NV5:        equ   %00100000   ;non volatile flag bit
NV4:        equ   %00010000   ;non volatile flag bit
NV3:        equ   %00001000   ;non volatile flag bit
NV2:        equ   %00000100   ;non volatile flag bit
SEC1:       equ   %00000010   ;memory security bit
SEC0:       equ   %00000001   ;memory security bit

; $102 reserved

FCNFG:      equ   $103        ;flash configuration register
;
CBEIE:      equ   %10000000   ;command buffer empty INT enable
CCIE:       equ   %01000000   ;command complete interrupt enable
KEYACC:     equ   %00100000   ;enable security key writing

FPROT:      equ   $104        ;flash protection register
;
FPOPEN:     equ   %10000000   ;opens the flash for program or erase
;NV6:       equ   %01000000   ;non volatile flag bit
; NV6 bit appears in FSEC register also
FPHDIS:     equ   %00100000   ;flash protect high addr range dis
FPHS1:      equ   %00010000   ;flash protection higher addr size1
FPHS0:      equ   %00001000   ;flash protection higher addr size0
FPLDIS:     equ   %00000100   ;flash protect lower addr range dis
FPLS1:      equ   %00000010   ;flash protection lower addr size1
FPLS0:      equ   %00000001   ;flash protection lower addr size0

FSTAT:      equ   $105        ;flash status register
;
CBEIF:      equ   %10000000   ;command buffer empty INT flag
CCIF:       equ   %01000000   ;command complete interrupt flag
PVIOL:      equ   %00100000   ;protection violation
ACCERR:     equ   %00010000   ;flash access error
BLANK:      equ   %00000100   ;array has been verified as erased

FCMD:       equ   $106        ;flash command register
;
CMDB6:      equ   %01000000   ;valid flash user mode commands
CMDB5:      equ   %00100000   ;valid flash user mode commands
CMDB2:      equ   %00000100   ;valid flash user mode commands
CMDB0:      equ   %00000001   ;valid flash user mode commands

; $107 reserved

FADDRHI:    equ   $108        ;flash address high register

FADDRLO:    equ   $109        ;flash address low register

FDATAHI:    equ   $10A        ;flash data high register

FDATALO:    equ   $10B        ;flash data low register

; $10C to $10F reserved



;****  EEPROM Control Register (EETS1KV1) ***************************************************
;*
ECLKDIV:    equ   $110        ;EEPROM clock divider register
;
EDIVLD:     equ   %10000000   ;clock divider loaded
EPRDIV8:    equ   %01000000   ;enable prescaler by 8
EDIV5:      equ   %00100000   ;clock divider bit